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Re: [PATCH 5/5] target/riscv: Add pointer mask support for instruction f


From: Richard Henderson
Subject: Re: [PATCH 5/5] target/riscv: Add pointer mask support for instruction fetch
Date: Mon, 27 Mar 2023 11:04:46 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0

On 3/27/23 03:00, Weiwei Li wrote:
@@ -1248,6 +1265,10 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int 
size,
      qemu_log_mask(CPU_LOG_MMU, "%s ad %" VADDR_PRIx " rw %d mmu_idx %d\n",
                    __func__, address, access_type, mmu_idx);
+ if (access_type == MMU_INST_FETCH) {
+        address = adjust_pc_address(env, address);
+    }

Why do you want to do this so late, as opposed to earlier in 
cpu_get_tb_cpu_state?


r~



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