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Re: [PATCH V4 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table
From: |
Igor Mammedov |
Subject: |
Re: [PATCH V4 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table |
Date: |
Fri, 24 Feb 2023 13:55:45 +0100 |
On Fri, 24 Feb 2023 14:06:59 +0530
Sunil V L <sunilvl@ventanamicro.com> wrote:
> RISC-V ACPI platforms need to provide RISC-V Hart Capabilities
> Table (RHCT). Add this to the ACPI tables.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
> hw/riscv/virt-acpi-build.c | 76 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 76 insertions(+)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index 8b85b34c55..7037fe7634 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -33,6 +33,7 @@
> #include "migration/vmstate.h"
> #include "hw/riscv/virt.h"
> #include "hw/riscv/numa.h"
> +#include "hw/intc/riscv_aclint.h"
>
> #define ACPI_BUILD_TABLE_SIZE 0x20000
>
> @@ -83,6 +84,78 @@ static void acpi_dsdt_add_fw_cfg(Aml *scope, const
> MemMapEntry *fw_cfg_memmap)
> aml_append(scope, dev);
> }
>
> +#define RHCT_NODE_ARRAY_OFFSET 56
same as previous patch, here should be proper comment
otherwise reviewer has no clue where to look for reference.
> +static void build_rhct(GArray *table_data,
> + BIOSLinker *linker,
> + RISCVVirtState *s)
> +{
> + MachineState *ms = MACHINE(s);
> + uint32_t acpi_proc_id = 0;
> + int i, socket;
> + RISCVCPU *cpu;
> + char *isa;
> + size_t len, aligned_len;
> + uint32_t isa_offset, num_rhct_nodes;
> +
> + AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
> + .oem_table_id = s->oem_table_id };
> +
> + acpi_table_begin(&table, table_data);
> +
> + build_append_int_noprefix(table_data, 0x0, 4); /* Reserved */
> +
> + /* Time Base Frequency */
> + build_append_int_noprefix(table_data,
> + RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, 8);
> +
> + /* ISA + N hart info */
> + num_rhct_nodes = 1 + ms->smp.cpus;
> +
> + /* Number of RHCT nodes*/
> + build_append_int_noprefix(table_data, num_rhct_nodes, 4);
> +
> + /* Offset to the RHCT node array */
> + build_append_int_noprefix(table_data, RHCT_NODE_ARRAY_OFFSET, 4);
> +
> + /* ISA string node */
> + isa_offset = table_data->len - table.table_offset;
> + build_append_int_noprefix(table_data, 0, 2); /* Type 0 */
> +
> + cpu = &s->soc[0].harts[0];
> + isa = riscv_isa_string(cpu);
> + len = 8 + strlen(isa) + 1;
> + aligned_len = (len % 2) ? (len + 1) : len;
> +
> + build_append_int_noprefix(table_data, aligned_len, 2); /* Length */
> + build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
> +
> + /* ISA string length including NUL */
> + build_append_int_noprefix(table_data, strlen(isa) + 1, 2);
> + g_array_append_vals(table_data, isa, strlen(isa) + 1); /* ISA string */
> +
> + if (aligned_len != len) {
> + build_append_int_noprefix(table_data, 0x0, 1); /* Optional Padding
> */
> + }
> +
> + for (socket = 0; socket < riscv_socket_count(ms); socket++) {
> + for (i = 0; i < s->soc[socket].num_harts; i++) {
> + build_append_int_noprefix(table_data, 0xFFFF, 2); /* Type */
> + build_append_int_noprefix(table_data, 16, 2); /* Length */
> + build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
> + build_append_int_noprefix(table_data, 1, 2); /* Number of
> offsets */
> +
> + /* ACPI Processor UID */
> + build_append_int_noprefix(table_data, acpi_proc_id, 4);
> +
> + /* Offsets[0] */
> + build_append_int_noprefix(table_data, isa_offset, 4);
> + acpi_proc_id++;
> + }
> + }
> +
> + acpi_table_end(linker, &table);
> +}
> +
> /* FADT */
> static void build_fadt_rev6(GArray *table_data,
> BIOSLinker *linker,
> @@ -197,6 +270,9 @@ static void virt_acpi_build(RISCVVirtState *s,
> AcpiBuildTables *tables)
> acpi_add_table(table_offsets, tables_blob);
> build_madt(tables_blob, tables->linker, s);
>
> + acpi_add_table(table_offsets, tables_blob);
> + build_rhct(tables_blob, tables->linker, s);
> +
> /* XSDT is pointed to by RSDP */
> xsdt = tables_blob->len;
> build_xsdt(tables_blob, tables->linker, table_offsets, s->oem_id,
- [PATCH V4 2/8] hw/riscv/virt: Add a switch to disable ACPI, (continued)
[PATCH V4 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table, Sunil V L, 2023/02/24
- Re: [PATCH V4 6/8] hw/riscv/virt: virt-acpi-build.c: Add RHCT Table,
Igor Mammedov <=
[PATCH V4 7/8] hw/riscv/virt.c: Initialize the ACPI tables, Sunil V L, 2023/02/24
[PATCH V4 8/8] MAINTAINERS: Add entry for RISC-V ACPI, Sunil V L, 2023/02/24