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From: | Richard Henderson |
Subject: | Re: [PATCH v6 2/4] target/riscv: implement Zicboz extension |
Date: | Wed, 22 Feb 2023 07:59:56 -1000 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 |
On 2/21/23 23:37, Daniel Henrique Barboza wrote:
Do you mean that the doc should tell whether the address to be returned in the store access fault should be aligned and whatnot?
Yes.
By reading target/riscv code it seems that all store acess faults are being fired via raise_mmu_exception(), which is only called in riscv_cpu_tlb_fill(), which in turn doesn't do any thing special with the address before firing the exception. So I guess we can assume that badddr = aligned?
Well that's certainly how the code is written, yes. r~
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