Re: [PATCH qemu 1/9] target/riscv: rvv: Add mask agnostic for vv instructions

[eop Chen]

Weiwei Li <liweiwei@iscas.ac.cn> 於 2022年4月26日 下午4:47 寫道：

在 2022/3/17 下午3:26, ~eopxd 写道:

From: Yueh-Ting (eop) Chen <eop.chen@sifive.com>

This is the first commit regarding the mask agnostic behavior.
Added option 'rvv_ma_all_1s' to enable the behavior, the option
is default to false.

Signed-off-by: eop Chen <eop.chen@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>

Similar to our last discussion,  vext_set_elems_1s_fns array can be simplified to single vext_set_elems_1s,

since the fourth argement can be used as the start offset.

Another question, may be not related to this patchset, in section 3.4.3 of the spec:

"Mask destination tail elements are always treated as tail-agnostic, regardless of the setting of vta."

What does "Mask destination tail elements" mean?

Regards,

Weiwei Li

I have just updated a new version for the tail agnostic patch set, it also includes a bug fix discovered today.

Regarding the question, mask / masked-off are for body elements and respects the mask policy, and tail elements respect the tail policy.

Regards,

eop Chen