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[RFC PATCH 00/18] user-creatable cpu clusters


From: Damien Hedde
Subject: [RFC PATCH 00/18] user-creatable cpu clusters
Date: Wed, 30 Mar 2022 14:56:21 +0200

Hi,

This series add devices to be able to user-create (coldplug) cpu
clusters. The existing cpu cluster dictates how cpus are exposed
in gdb, but it does not handle the cpu objects creation. This series
adds a new device to handle both issues and adds support for two
architectures: arm and riscv.

Please look at patches 2 and 3 for more details about the new device.

Last part concerning the riscv is rfc as I do non-backward compatible
updates. I'm not sure what migration (or other) constraints we have
on these machines and I probably need to make some changes to cope
with them.

This series almost deprecates the cpu-cluster type as all uses
but one are replaced.

It is organized as follows:

+ Patches 1 to 7 adds a new base device to replace cpu-cluster

+ Patches 8 and 9 adds an arm specific version and replace existing
  clusters in the xlnx-zynqmp machine.

+ patches 10 to 17 updates the riscv_array. It was already used to
  create cpus but was not a cpu cluster.

Thanks for any comments,
--
Damien

Damien Hedde (18):
  define MAX_CLUSTERS in cpu.h instead of cluster.h
  hw/cpu/cpus: introduce _cpus_ device
  hw/cpu/cpus: prepare to handle cpu clusters
  hw/cpu/cluster: make _cpu-cluster_ a subclass of _cpus_
  gdbstub: deal with _cpus_ object instead of _cpu-cluster_
  hw/cpu/cluster: remove cluster_id now that gdbstub is updated
  hw/cpu/cpus: add a common start-powered-off property
  hw/arm/arm_cpus: add arm_cpus device
  hw/arm/xlnx-zynqmp: convert cpu clusters to arm_cpus
  hw/riscv/riscv_hart: prepare transition to cpus
  hw/riscv: prepare riscv_hart transition to cpus
  hw/riscv/virt: prepare riscv_hart transition to cpus
  hw/riscv/spike: prepare riscv_hart transition to cpus
  hw/riscv/riscv_hart: use cpus as base class
  hw/riscv/sifive_u&microchip_pfsoc: apply riscv_hart_array update
  hw/riscv: update remaining machines due to riscv_hart_array update
  hw/riscv/riscv_hart: remove temporary features
  add myself as reviewer of the newly added _cpus_

 include/hw/arm/arm_cpus.h          |  45 +++++++
 include/hw/arm/xlnx-zynqmp.h       |   8 +-
 include/hw/core/cpu.h              |   6 +
 include/hw/cpu/cluster.h           |  26 ++--
 include/hw/cpu/cpus.h              |  93 ++++++++++++++
 include/hw/riscv/microchip_pfsoc.h |   2 -
 include/hw/riscv/riscv_hart.h      |  25 +++-
 include/hw/riscv/sifive_u.h        |   2 -
 gdbstub.c                          |  12 +-
 hw/arm/arm_cpus.c                  |  63 ++++++++++
 hw/arm/xlnx-zynqmp.c               | 121 +++++++-----------
 hw/cpu/cluster.c                   |  53 ++++----
 hw/cpu/cpus.c                      | 195 +++++++++++++++++++++++++++++
 hw/riscv/boot.c                    |   2 +-
 hw/riscv/microchip_pfsoc.c         |  28 +----
 hw/riscv/opentitan.c               |   4 +-
 hw/riscv/riscv_hart.c              |  44 ++-----
 hw/riscv/shakti_c.c                |   4 +-
 hw/riscv/sifive_e.c                |   4 +-
 hw/riscv/sifive_u.c                |  31 ++---
 hw/riscv/spike.c                   |  18 +--
 hw/riscv/virt.c                    |  79 +++++++-----
 MAINTAINERS                        |   3 +
 hw/arm/meson.build                 |   1 +
 hw/cpu/meson.build                 |   2 +-
 25 files changed, 612 insertions(+), 259 deletions(-)
 create mode 100644 include/hw/arm/arm_cpus.h
 create mode 100644 include/hw/cpu/cpus.h
 create mode 100644 hw/arm/arm_cpus.c
 create mode 100644 hw/cpu/cpus.c

-- 
2.35.1




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