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[PATCH qemu 00/13] Add tail agnostic behavior for rvv instructions
From: |
~eopxd |
Subject: |
[PATCH qemu 00/13] Add tail agnostic behavior for rvv instructions |
Date: |
Sat, 19 Mar 2022 12:50:39 +0000 |
According to v-spec, tail agnostic behavior can be either kept as
undisturbed or set elements' bits to all 1s. To distinguish the
difference of tail policies, qemu should be able to simulate the tail
agnostic behavior as "set tail elements' bits to all 1s". An option
'rvv_ta_all_1s' is added to enable the behavior, it is default as
disabled.
eopXD (13):
target/riscv: rvv: Prune redundant ESZ, DSZ parameter passed
target/riscv: rvv: Rename ambiguous esz
target/riscv: rvv: Early exit when vstart >= vl
target/riscv: rvv: Add tail agnostic for vv instructions
target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructions
target/riscv: rvv: Add tail agnostic for vector integer shift
instructions
target/riscv: rvv: Add tail agnostic for vector integer comparison
instructions
target/riscv: rvv: Add tail agnostic for vector integer merge and move
instructions
target/riscv: rvv: Add tail agnostic for vector fix-point arithmetic
instructions
target/riscv: rvv: Add tail agnostic for vector floating-point
instructions
target/riscv: rvv: Add tail agnostic for vector reduction instructions
target/riscv: rvv: Add tail agnostic for vector mask instructions
target/riscv: rvv: Add tail agnostic for vector permutation
instructions
target/riscv/cpu.c | 1 +
target/riscv/cpu.h | 2 +
target/riscv/cpu_helper.c | 2 +
target/riscv/insn_trans/trans_rvv.c.inc | 58 +
target/riscv/internals.h | 5 +-
target/riscv/translate.c | 2 +
target/riscv/vector_helper.c | 1508 ++++++++++++++---------
7 files changed, 961 insertions(+), 617 deletions(-)
--
2.34.1
- [PATCH qemu 00/13] Add tail agnostic behavior for rvv instructions,
~eopxd <=
- [PATCH qemu 03/13] target/riscv: rvv: Early exit when vstart >= vl, ~eopxd, 2022/03/19
- [PATCH qemu 01/13] target/riscv: rvv: Prune redundant ESZ, DSZ parameter passed, ~eopxd, 2022/03/19
- [PATCH qemu 04/13] target/riscv: rvv: Add tail agnostic for vv instructions, ~eopxd, 2022/03/19
- [PATCH qemu 05/13] target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructions, ~eopxd, 2022/03/19
- [PATCH qemu 07/13] target/riscv: rvv: Add tail agnostic for vector integer comparison instructions, ~eopxd, 2022/03/19