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Re: [PATCH 2/6] target/riscv: add support for unique fpr read/write with
From: |
liweiwei |
Subject: |
Re: [PATCH 2/6] target/riscv: add support for unique fpr read/write with support for zfinx |
Date: |
Sun, 26 Dec 2021 09:42:38 +0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 |
Sorry. In the old spec(version 0.41), nanboxing is not totally
disabled, but "NaN-boxing is limited to XLEN
bits,
not FLEN
bits". Taking misa.mxl into acount, if
misa.mxl is RV32, and maximum is RV64, this should be
sign-extended. Is there any other new update for nanboxing to the
spec?
在 2021/12/26 上午6:00, Richard Henderson
写道:
On
12/24/21 7:13 PM, liweiwei wrote:
In RV64 case, this should be nan-boxing
value( upper bits are all ones). However, zfinx will not check
nan-boxing of source, the upper 32 bits have no effect on the
final result. So I think both zero-extended or sign-extended are
OK.
There is no nanboxing in zfinx at all -- values are sign-extended.
r~
- Re: [PATCH 1/6] target/riscv: add cfg properties for zfinx, zdinx and zhinx{min}, (continued)
[PATCH 3/6] target/riscv: add support for zfinx, liweiwei, 2021/12/23
[PATCH 4/6] target/riscv: add support for zdinx, liweiwei, 2021/12/23