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Re: [PATCH v4 05/17] target/riscv: array for the 64 upper bits of 128-bi


From: Richard Henderson
Subject: Re: [PATCH v4 05/17] target/riscv: array for the 64 upper bits of 128-bit registers
Date: Mon, 25 Oct 2021 12:10:07 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0

On 10/25/21 5:28 AM, Frédéric Pétrot wrote:
The upper 64-bit of the 128-bit registers have now a place inside
the cpu state structure, and are created as globals for future use.

Signed-off-by: Frédéric Pétrot<frederic.petrot@univ-grenoble-alpes.fr>
Co-authored-by: Fabien Portas<fabien.portas@grenoble-inp.org>
---
  target/riscv/cpu.h       |  2 ++
  target/riscv/cpu.c       |  9 +++++++++
  target/riscv/machine.c   | 20 ++++++++++++++++++++
  target/riscv/translate.c |  5 ++++-
  4 files changed, 35 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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