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Re: [PATCH v1 1/9] hw/riscv: opentitan: Update to the latest build
From: |
Bin Meng |
Subject: |
Re: [PATCH v1 1/9] hw/riscv: opentitan: Update to the latest build |
Date: |
Thu, 21 Oct 2021 15:26:56 +0800 |
On Mon, Oct 18, 2021 at 10:38 AM Alistair Francis
<alistair.francis@opensource.wdc.com> wrote:
>
> From: Alistair Francis <alistair.francis@wdc.com>
>
> Update the OpenTitan machine model to match the latest OpenTitan FPGA
> design.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> include/hw/riscv/opentitan.h | 6 +++---
> hw/riscv/opentitan.c | 22 +++++++++++++++++-----
> 2 files changed, 20 insertions(+), 8 deletions(-)
>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Re: [PATCH v1 5/9] hw/intc: sifive_plic: Cleanup the irq_request function, (continued)