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[PATCH v4 8/8] target/riscv: zfh: add Zfhmin cpu property
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From: |
frank . chang |
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Subject: |
[PATCH v4 8/8] target/riscv: zfh: add Zfhmin cpu property |
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Date: |
Wed, 20 Oct 2021 11:06:51 +0800 |
From: Frank Chang <frank.chang@sifive.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 8c579dc297b..4c0e6532164 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -602,6 +602,7 @@ static Property riscv_cpu_properties[] = {
DEFINE_PROP_BOOL("Zifencei", RISCVCPU, cfg.ext_ifencei, true),
DEFINE_PROP_BOOL("Zicsr", RISCVCPU, cfg.ext_icsr, true),
DEFINE_PROP_BOOL("Zfh", RISCVCPU, cfg.ext_zfh, false),
+ DEFINE_PROP_BOOL("Zfhmin", RISCVCPU, cfg.ext_zfhmin, false),
DEFINE_PROP_STRING("priv_spec", RISCVCPU, cfg.priv_spec),
DEFINE_PROP_STRING("vext_spec", RISCVCPU, cfg.vext_spec),
DEFINE_PROP_UINT16("vlen", RISCVCPU, cfg.vlen, 128),
--
2.25.1
- [PATCH v4 0/8] target/riscv: support Zfh, Zfhmin extension v0.1, frank . chang, 2021/10/19
- [PATCH v4 1/8] target/riscv: zfh: half-precision load and store, frank . chang, 2021/10/19
- [PATCH v4 3/8] target/riscv: zfh: half-precision convert and move, frank . chang, 2021/10/19
- [PATCH v4 4/8] target/riscv: zfh: half-precision floating-point compare, frank . chang, 2021/10/19
- [PATCH v4 5/8] target/riscv: zfh: half-precision floating-point classify, frank . chang, 2021/10/19
- [PATCH v4 2/8] target/riscv: zfh: half-precision computational, frank . chang, 2021/10/19
- [PATCH v4 6/8] target/riscv: zfh: add Zfh cpu property, frank . chang, 2021/10/19
- [PATCH v4 7/8] target/riscv: zfh: implement zfhmin extension, frank . chang, 2021/10/19
- [PATCH v4 8/8] target/riscv: zfh: add Zfhmin cpu property,
frank . chang <=