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Re: [PATCH v2 48/53] target/sparc: convert to use format_tlb callback


From: Mark Cave-Ayland
Subject: Re: [PATCH v2 48/53] target/sparc: convert to use format_tlb callback
Date: Thu, 16 Sep 2021 11:54:19 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0

On 14/09/2021 15:20, Daniel P. Berrangé wrote:

Change the "info tlb" implementation to use the format_tlb callback.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
---
  target/sparc/cpu.c        |  1 +
  target/sparc/cpu.h        |  1 +
  target/sparc/mmu_helper.c | 43 ++++++++++++++++++++++++---------------
  target/sparc/monitor.c    | 10 ++++++---
  4 files changed, 36 insertions(+), 19 deletions(-)

diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 9346a79239..f78ddc72b5 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -898,6 +898,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void 
*data)
      cc->has_work = sparc_cpu_has_work;
      cc->format_state = sparc_cpu_format_state;
  #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY)
+    cc->format_tlb = sparc_cpu_format_tlb;
      cc->memory_rw_debug = sparc_cpu_memory_rw_debug;
  #endif
      cc->set_pc = sparc_cpu_set_pc;
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 65a01a7884..233f0b3eb7 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -572,6 +572,7 @@ extern const VMStateDescription vmstate_sparc_cpu;
void sparc_cpu_do_interrupt(CPUState *cpu);
  void sparc_cpu_format_state(CPUState *cpu, GString *buf, int flags);
+void sparc_cpu_format_tlb(CPUState *cpu, GString *buf);
  hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
  int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
  int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index a44473a1c7..06b16aca6a 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -371,37 +371,39 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong 
address, int mmulev)
      return 0;
  }
-void dump_mmu(CPUSPARCState *env)
+void sparc_cpu_format_tlb(CPUState *cpu, GString *buf)
  {
-    CPUState *cs = env_cpu(env);
+    CPUSPARCState *env = cpu->env_ptr;
      target_ulong va, va1, va2;
      unsigned int n, m, o;
      hwaddr pa;
      uint32_t pde;
- qemu_printf("Root ptr: " TARGET_FMT_plx ", ctx: %d\n",
-                (hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]);
+    g_string_append_printf(buf, "Root ptr: " TARGET_FMT_plx ", ctx: %d\n",
+                           (hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]);
      for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) {
          pde = mmu_probe(env, va, 2);
          if (pde) {
-            pa = cpu_get_phys_page_debug(cs, va);
-            qemu_printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_plx
-                        " PDE: " TARGET_FMT_lx "\n", va, pa, pde);
+            pa = cpu_get_phys_page_debug(cpu, va);
+            g_string_append_printf(buf, "VA: " TARGET_FMT_lx
+                                   ", PA: " TARGET_FMT_plx
+                                   " PDE: " TARGET_FMT_lx "\n", va, pa, pde);
              for (m = 0, va1 = va; m < 64; m++, va1 += 256 * 1024) {
                  pde = mmu_probe(env, va1, 1);
                  if (pde) {
-                    pa = cpu_get_phys_page_debug(cs, va1);
-                    qemu_printf(" VA: " TARGET_FMT_lx ", PA: "
-                                TARGET_FMT_plx " PDE: " TARGET_FMT_lx "\n",
-                                va1, pa, pde);
+                    pa = cpu_get_phys_page_debug(cpu, va1);
+                    g_string_append_printf(buf, " VA: " TARGET_FMT_lx
+                                           ", PA: " TARGET_FMT_plx
+                                           " PDE: " TARGET_FMT_lx "\n",
+                                           va1, pa, pde);
                      for (o = 0, va2 = va1; o < 64; o++, va2 += 4 * 1024) {
                          pde = mmu_probe(env, va2, 0);
                          if (pde) {
-                            pa = cpu_get_phys_page_debug(cs, va2);
-                            qemu_printf("  VA: " TARGET_FMT_lx ", PA: "
-                                        TARGET_FMT_plx " PTE: "
-                                        TARGET_FMT_lx "\n",
-                                        va2, pa, pde);
+                            pa = cpu_get_phys_page_debug(cpu, va2);
+                            g_string_append_printf(buf, "  VA: " TARGET_FMT_lx
+                                                   ", PA: " TARGET_FMT_plx
+                                                   " PTE: " TARGET_FMT_lx "\n",
+                                                   va2, pa, pde);
                          }
                      }
                  }
@@ -410,6 +412,15 @@ void dump_mmu(CPUSPARCState *env)
      }
  }
+void dump_mmu(CPUSPARCState *env)
+{
+    CPUState *cs = env_cpu(env);
+    g_autoptr(GString) buf = g_string_new("");
+
+    sparc_cpu_format_tlb(cs, buf);
+    qemu_printf("%s", buf->str);
+}
+
  /* Gdb expects all registers windows to be flushed in ram. This function 
handles
   * reads (and only reads) in stack frames as if windows were flushed. We 
assume
   * that the sparc ABI is followed.
diff --git a/target/sparc/monitor.c b/target/sparc/monitor.c
index 318413686a..cc7fe74e3e 100644
--- a/target/sparc/monitor.c
+++ b/target/sparc/monitor.c
@@ -30,13 +30,17 @@
void hmp_info_tlb(Monitor *mon, const QDict *qdict)
  {
-    CPUArchState *env1 = mon_get_cpu_env(mon);
+    g_autoptr(GString) buf = g_string_new("");
+    CPUState *cpu = mon_get_cpu(mon);
- if (!env1) {
+    if (!cpu) {
          monitor_printf(mon, "No CPU available\n");
          return;
      }
-    dump_mmu(env1);
+
+    cpu_format_tlb(cpu, buf);
+
+    monitor_printf(mon, "%s", buf->str);
  }
#ifndef TARGET_SPARC64

Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>


ATB,

Mark.



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