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Re: [PATCH v2 05/22] target/riscv: Allow setting CPU feature from machin
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From: |
Bin Meng |
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Subject: |
Re: [PATCH v2 05/22] target/riscv: Allow setting CPU feature from machine/device emulation |
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Date: |
Sat, 4 Sep 2021 23:12:37 +0800 |
On Thu, Sep 2, 2021 at 7:42 PM Anup Patel <anup.patel@wdc.com> wrote:
>
> The machine or device emulation should be able to force set certain
> CPU features because:
> 1) We can have certain CPU features which are in-general optional
> but implemented by RISC-V CPUs on machine.
on the machine
> 2) We can have devices which require certain CPU feature. For example,
a certain
> AIA IMSIC devices expects AIA CSRs implemented by RISC-V CPUs.
expect
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> ---
> target/riscv/cpu.c | 11 +++--------
> target/riscv/cpu.h | 5 +++++
> 2 files changed, 8 insertions(+), 8 deletions(-)
>
Otherwise,
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Re: [PATCH v2 03/22] target/riscv: Implement hgeie and hgeip CSRs, (continued)
[PATCH v2 05/22] target/riscv: Allow setting CPU feature from machine/device emulation, Anup Patel, 2021/09/02
[PATCH v2 07/22] target/riscv: Add defines for AIA CSRs, Anup Patel, 2021/09/02
[PATCH v2 11/22] target/riscv: Implement AIA hvictl and hviprioX CSRs, Anup Patel, 2021/09/02
[PATCH v2 06/22] target/riscv: Add AIA cpu feature, Anup Patel, 2021/09/02
[PATCH v2 08/22] target/riscv: Allow AIA device emulation to set ireg rmw callback, Anup Patel, 2021/09/02
[PATCH v2 09/22] target/riscv: Implement AIA local interrupt priorities, Anup Patel, 2021/09/02
[PATCH v2 10/22] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32, Anup Patel, 2021/09/02
[PATCH v2 12/22] target/riscv: Implement AIA interrupt filtering CSRs, Anup Patel, 2021/09/02