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Re: [PATCH v3 02/21] target/riscv: Clean up division helpers


From: Bin Meng
Subject: Re: [PATCH v3 02/21] target/riscv: Clean up division helpers
Date: Thu, 19 Aug 2021 19:00:16 +0800

On Thu, Aug 19, 2021 at 5:07 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Utilize the condition in the movcond more; this allows some of
> the setcond that were feeding into movcond to be removed.
> Do not write into source1 and source2.  Re-name "condN" to "tempN"
> and use the temporaries for more than holding conditions.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/riscv/translate.c | 146 +++++++++++++++++++--------------------
>  1 file changed, 71 insertions(+), 75 deletions(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 20a55c92fb..b52181538f 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -213,106 +213,102 @@ static void gen_mulhsu(TCGv ret, TCGv arg1, TCGv arg2)
>
>  static void gen_div(TCGv ret, TCGv source1, TCGv source2)
>  {
> -    TCGv cond1, cond2, zeroreg, resultopt1;
> +    TCGv temp1, temp2, zero, one, mone, min;
> +
>      /*
>       * Handle by altering args to tcg_gen_div to produce req'd results:
> -     * For overflow: want source1 in source1 and 1 in source2
> -     * For div by zero: want -1 in source1 and 1 in source2 -> -1 result
> +     * For overflow: want source1 in temp1 and 1 in temp2
> +     * For div by zero: want -1 in temp1 and 1 in temp2 -> -1 result
>       */
> -    cond1 = tcg_temp_new();
> -    cond2 = tcg_temp_new();
> -    zeroreg = tcg_constant_tl(0);
> -    resultopt1 = tcg_temp_new();
> +    temp1 = tcg_temp_new();
> +    temp2 = tcg_temp_new();
> +    zero = tcg_constant_tl(0);
> +    one = tcg_constant_tl(1);
> +    mone = tcg_constant_tl(-1);
> +    min = tcg_constant_tl(1ull << (TARGET_LONG_BITS - 1));
>
> -    tcg_gen_movi_tl(resultopt1, (target_ulong)-1);
> -    tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, (target_ulong)(~0L));
> -    tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source1,
> -                        ((target_ulong)1) << (TARGET_LONG_BITS - 1));
> -    tcg_gen_and_tl(cond1, cond1, cond2); /* cond1 = overflow */
> -    tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, 0); /* cond2 = div 0 */
> -    /* if div by zero, set source1 to -1, otherwise don't change */
> -    tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond2, zeroreg, source1,
> -            resultopt1);
> -    /* if overflow or div by zero, set source2 to 1, else don't change */
> -    tcg_gen_or_tl(cond1, cond1, cond2);
> -    tcg_gen_movi_tl(resultopt1, (target_ulong)1);
> -    tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2,
> -            resultopt1);
> -    tcg_gen_div_tl(ret, source1, source2);
> +    tcg_gen_setcond_tl(TCG_COND_EQ, temp1, source1, min);
> +    tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, mone);
> +    tcg_gen_and_tl(temp1, temp1, temp2); /* temp1 = overflow */
> +    tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, zero); /* temp2 = div0 */
> +    tcg_gen_or_tl(temp2, temp2, temp1);  /* temp2 = overflow | div0 */
>
> -    tcg_temp_free(cond1);
> -    tcg_temp_free(cond2);
> -    tcg_temp_free(resultopt1);
> +    /* if div by zero, set temp1 to -1, else source1. */
> +    tcg_gen_movcond_tl(TCG_COND_EQ, temp1, source2, zero, mone, source1);
> +
> +    /* if overflow or div by zero, set temp2 to 1, else source2 */
> +    tcg_gen_movcond_tl(TCG_COND_NE, temp2, temp2, zero, one, source2);
> +
> +    tcg_gen_div_tl(ret, temp1, temp2);
> +
> +    tcg_temp_free(temp1);
> +    tcg_temp_free(temp2);
>  }
>
>  static void gen_divu(TCGv ret, TCGv source1, TCGv source2)
>  {
> -    TCGv cond1, zeroreg, resultopt1;
> -    cond1 = tcg_temp_new();
> +    TCGv temp1, temp2, zero, one, max;
>
> -    zeroreg = tcg_constant_tl(0);
> -    resultopt1 = tcg_temp_new();
> +    temp1 = tcg_temp_new();
> +    temp2 = tcg_temp_new();
> +    zero = tcg_constant_tl(0);
> +    one = tcg_constant_tl(1);
> +    max = tcg_constant_tl(~0);
>
> -    tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0);
> -    tcg_gen_movi_tl(resultopt1, (target_ulong)-1);
> -    tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond1, zeroreg, source1,
> -            resultopt1);
> -    tcg_gen_movi_tl(resultopt1, (target_ulong)1);
> -    tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2,
> -            resultopt1);
> -    tcg_gen_divu_tl(ret, source1, source2);
> +    tcg_gen_movcond_tl(TCG_COND_EQ, temp1, source2, zero, max, source1);
> +    tcg_gen_movcond_tl(TCG_COND_EQ, temp2, source2, zero, one, source2);
> +    tcg_gen_divu_tl(ret, temp1, temp2);
>
> -    tcg_temp_free(cond1);
> -    tcg_temp_free(resultopt1);
> +    tcg_temp_free(temp1);
> +    tcg_temp_free(temp2);
>  }
>
>  static void gen_rem(TCGv ret, TCGv source1, TCGv source2)
>  {
> -    TCGv cond1, cond2, zeroreg, resultopt1;
> +    TCGv temp1, temp2, zero, one, mone, min;
>
> -    cond1 = tcg_temp_new();
> -    cond2 = tcg_temp_new();
> -    zeroreg = tcg_constant_tl(0);
> -    resultopt1 = tcg_temp_new();
> +    temp1 = tcg_temp_new();
> +    temp2 = tcg_temp_new();
> +    zero = tcg_constant_tl(0);
> +    one = tcg_constant_tl(1);
> +    mone = tcg_constant_tl(-1);
> +    min = tcg_constant_tl(1ull << (TARGET_LONG_BITS - 1));
>
> -    tcg_gen_movi_tl(resultopt1, 1L);
> -    tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, (target_ulong)-1);
> -    tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source1,
> -                        (target_ulong)1 << (TARGET_LONG_BITS - 1));
> -    tcg_gen_and_tl(cond2, cond1, cond2); /* cond1 = overflow */
> -    tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0); /* cond2 = div 0 */
> -    /* if overflow or div by zero, set source2 to 1, else don't change */
> -    tcg_gen_or_tl(cond2, cond1, cond2);
> -    tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond2, zeroreg, source2,
> -            resultopt1);
> -    tcg_gen_rem_tl(resultopt1, source1, source2);
> -    /* if div by zero, just return the original dividend */
> -    tcg_gen_movcond_tl(TCG_COND_EQ, ret, cond1, zeroreg, resultopt1,
> -            source1);
> +    tcg_gen_setcond_tl(TCG_COND_EQ, temp1, source1, min);
> +    tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, mone);
> +    tcg_gen_and_tl(temp1, temp1, temp2); /* temp1 = overflow */
> +    tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, zero); /* temp2 = div0 */
> +    tcg_gen_or_tl(temp2, temp2, temp1);  /* temp2 = overflow | div0 */
>
> -    tcg_temp_free(cond1);
> -    tcg_temp_free(cond2);
> -    tcg_temp_free(resultopt1);
> +    /*
> +     * if overflow or div by zero, set temp2 to 1, else source2
> +     * this automatically takes care of returning the original
> +     * dividend for div by zero.
> +     */
> +    tcg_gen_movcond_tl(TCG_COND_NE, temp2, temp2, zero, one, source2);

What about the overflow case? The return value should be 0.

> +
> +    tcg_gen_rem_tl(ret, source1, temp2);
> +
> +    tcg_temp_free(temp1);
> +    tcg_temp_free(temp2);
>  }
>
>  static void gen_remu(TCGv ret, TCGv source1, TCGv source2)
>  {
> -    TCGv cond1, zeroreg, resultopt1;
> -    cond1 = tcg_temp_new();
> -    zeroreg = tcg_constant_tl(0);
> -    resultopt1 = tcg_temp_new();
> +    TCGv temp2, zero, one;
>
> -    tcg_gen_movi_tl(resultopt1, (target_ulong)1);
> -    tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0);
> -    tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2,
> -            resultopt1);
> -    tcg_gen_remu_tl(resultopt1, source1, source2);
> -    /* if div by zero, just return the original dividend */
> -    tcg_gen_movcond_tl(TCG_COND_EQ, ret, cond1, zeroreg, resultopt1,
> -            source1);
> +    temp2 = tcg_temp_new();
> +    zero = tcg_constant_tl(0);
> +    one = tcg_constant_tl(1);
>
> -    tcg_temp_free(cond1);
> -    tcg_temp_free(resultopt1);
> +    /*
> +     * if div by zero, set temp2 to 1, else source2
> +     * this automatically takes care of returning the original dividend.
> +     */
> +    tcg_gen_movcond_tl(TCG_COND_EQ, temp2, source2, zero, one, source2);
> +    tcg_gen_remu_tl(ret, source1, temp2);
> +
> +    tcg_temp_free(temp2);
>  }
>
>  static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)

Regards,
Bin



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