Re: [PATCH 00/17] target/riscv: Use tcg_constant

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Re: [PATCH 00/17] target/riscv: Use tcg_constant_*

From:	Richard Henderson
Subject:	Re: [PATCH 00/17] target/riscv: Use tcg_constant_*
Date:	Sat, 17 Jul 2021 08:41:30 -0700
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 7/16/21 8:59 PM, LIU Zhiwei wrote:

If we want to strictly obey the spec, we should
1) Ignore MSB 32bits for source register, and sign-extend the destination 
register.
2) Always use 32bit operation(TCG 32bit OP).

I want to still use TCG 64bit OP and just extend the source to 64bit by ext32s 
or ext32u.

Is is OK?


Yes, that sounds right.


r~

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Re: [PATCH 10/17] target/riscv: Use gpr_{src,dst} for RVA, (continued)
- [PATCH 08/17] target/riscv: Use gpr_{src, dst} for word shift operations, Richard Henderson, 2021/07/09
  - Re: [PATCH 08/17] target/riscv: Use gpr_{src, dst} for word shift operations, Alistair Francis, 2021/07/15
- [PATCH 15/17] target/riscv: Use gen_arith for mulh and mulhu, Richard Henderson, 2021/07/09
  - Re: [PATCH 15/17] target/riscv: Use gen_arith for mulh and mulhu, Alistair Francis, 2021/07/15
- [PATCH 13/17] target/riscv: Use gpr_{src,dst} for RVD, Richard Henderson, 2021/07/09
  - Re: [PATCH 13/17] target/riscv: Use gpr_{src,dst} for RVD, Alistair Francis, 2021/07/15
- Re: [PATCH 00/17] target/riscv: Use tcg_constant_*, LIU Zhiwei, 2021/07/15
  - Re: [PATCH 00/17] target/riscv: Use tcg_constant_*, Richard Henderson, 2021/07/15
    - Re: [PATCH 00/17] target/riscv: Use tcg_constant_*, LIU Zhiwei, 2021/07/17
    - Re: [PATCH 00/17] target/riscv: Use tcg_constant_*, Richard Henderson <=

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