Re: [PATCH v2 05/37] target/riscv: SIMD 16-bit Shift Instructions

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Re: [PATCH v2 05/37] target/riscv: SIMD 16-bit Shift Instructions

From:	Richard Henderson
Subject:	Re: [PATCH v2 05/37] target/riscv: SIMD 16-bit Shift Instructions
Date:	Thu, 10 Jun 2021 12:44:04 -0700
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1

On 6/10/21 12:58 AM, LIU Zhiwei wrote:

  include/tcg/tcg-op-gvec.h               |   9 ++
  tcg/tcg-op-gvec.c                       |  28 +++++++


Again, should be split out, with a

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

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[PATCH v2 00/37] target/riscv: support packed extension v0.9.4, LIU Zhiwei, 2021/06/10
- [PATCH v2 01/37] target/riscv: implementation-defined constant parameters, LIU Zhiwei, 2021/06/10
- [PATCH v2 02/37] target/riscv: Make the vector helper functions public, LIU Zhiwei, 2021/06/10
- [PATCH v2 03/37] target/riscv: 16-bit Addition & Subtraction Instructions, LIU Zhiwei, 2021/06/10
  - Re: [PATCH v2 03/37] target/riscv: 16-bit Addition & Subtraction Instructions, Richard Henderson, 2021/06/10
- [PATCH v2 04/37] target/riscv: 8-bit Addition & Subtraction Instruction, LIU Zhiwei, 2021/06/10
  - Re: [PATCH v2 04/37] target/riscv: 8-bit Addition & Subtraction Instruction, Richard Henderson, 2021/06/10
    - Re: [PATCH v2 04/37] target/riscv: 8-bit Addition & Subtraction Instruction, LIU Zhiwei, 2021/06/11
    - Re: [PATCH v2 04/37] target/riscv: 8-bit Addition & Subtraction Instruction, LIU Zhiwei, 2021/06/24
- [PATCH v2 05/37] target/riscv: SIMD 16-bit Shift Instructions, LIU Zhiwei, 2021/06/10
  - Re: [PATCH v2 05/37] target/riscv: SIMD 16-bit Shift Instructions, Richard Henderson <=
- [PATCH v2 06/37] target/riscv: SIMD 8-bit Shift Instructions, LIU Zhiwei, 2021/06/10
- [PATCH v2 07/37] target/riscv: SIMD 16-bit Compare Instructions, LIU Zhiwei, 2021/06/10
- [PATCH v2 08/37] target/riscv: SIMD 8-bit Compare Instructions, LIU Zhiwei, 2021/06/10
- [PATCH v2 09/37] target/riscv: SIMD 16-bit Multiply Instructions, LIU Zhiwei, 2021/06/10
- [PATCH v2 10/37] target/riscv: SIMD 8-bit Multiply Instructions, LIU Zhiwei, 2021/06/10
- [PATCH v2 11/37] target/riscv: SIMD 16-bit Miscellaneous Instructions, LIU Zhiwei, 2021/06/10
- [PATCH v2 12/37] target/riscv: SIMD 8-bit Miscellaneous Instructions, LIU Zhiwei, 2021/06/10
- [PATCH v2 13/37] target/riscv: 8-bit Unpacking Instructions, LIU Zhiwei, 2021/06/10
- [PATCH v2 14/37] target/riscv: 16-bit Packing Instructions, LIU Zhiwei, 2021/06/10
- [PATCH v2 15/37] target/riscv: Signed MSW 32x32 Multiply and Add Instructions, LIU Zhiwei, 2021/06/10

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