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[PATCH v1 0/3] hw/riscv: OpenTitan: Add support for the RISC-V timer


From: Alistair Francis
Subject: [PATCH v1 0/3] hw/riscv: OpenTitan: Add support for the RISC-V timer
Date: Mon, 31 May 2021 14:33:26 +1000

Alistair Francis (3):
  hw/char/ibex_uart: Make the register layout private
  hw/timer: Initial commit of Ibex Timer
  hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer

 include/hw/char/ibex_uart.h   |  37 -----
 include/hw/riscv/opentitan.h  |   5 +-
 include/hw/timer/ibex_timer.h |  52 ++++++
 hw/char/ibex_uart.c           |  37 +++++
 hw/riscv/opentitan.c          |  14 +-
 hw/timer/ibex_timer.c         | 305 ++++++++++++++++++++++++++++++++++
 MAINTAINERS                   |   6 +-
 hw/timer/meson.build          |   1 +
 8 files changed, 412 insertions(+), 45 deletions(-)
 create mode 100644 include/hw/timer/ibex_timer.h
 create mode 100644 hw/timer/ibex_timer.c

-- 
2.31.1




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