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Re: [PATCH v1 4/8] target/riscv: Remove the hardcoded MSTATUS_SD macro
From: |
Alistair Francis |
Subject: |
Re: [PATCH v1 4/8] target/riscv: Remove the hardcoded MSTATUS_SD macro |
Date: |
Thu, 8 Apr 2021 11:20:53 -0400 |
On Mon, Apr 5, 2021 at 11:10 AM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 4/2/21 1:02 PM, Alistair Francis wrote:
> > @@ -369,6 +369,9 @@ static void gen_jal(DisasContext *ctx, int rd,
> > target_ulong imm)
> > static void mark_fs_dirty(DisasContext *ctx)
> > {
> > TCGv tmp;
> > + CPUState *cpu = ctx->cs;
> > + CPURISCVState *env = cpu->env_ptr;
> > +
> > if (ctx->mstatus_fs == MSTATUS_FS) {
> > return;
> > }
> > @@ -377,12 +380,24 @@ static void mark_fs_dirty(DisasContext *ctx)
> >
> > tmp = tcg_temp_new();
> > tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
> > - tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | MSTATUS_SD);
> > + if (riscv_cpu_is_32bit(env)) {
>
> This is less than ideal, and will be incorrect long term.
> You should check ctx->misa instead.
>
> Eventually you'll need to change riscv_tr_init_disas_context to not just copy
> ctx->misa from env. At present we flush all translation blocks when misa
> changes, which works. But you won't want to do that when the hypervisor is
> 64-bit and the guest is 32-bit.
>
> Anyway, I think it would be a good idea to create a helper local to translate,
> akin to has_ext().
>
> > + tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | MSTATUS32_SD);
> > + } else {
> > +#if defined(TARGET_RISCV64)
> > + tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | MSTATUS64_SD);
> > +#endif
>
> The ifdefs are ugly. I presume there's some sort of compiler warning here?
> Does it go away if you cast to target_ulong?
>
> How about
>
> target_ulong sd = is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD;
It turns out clang doesn't like this, so I might still be stuck with ifdefs.
Alistair
> tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd);
>
>
> r~