Re: [PATCH 0/3] target/riscv: fix PMP permission checking when softmmu's TLB hits

[Alistair Francis]

On Sun, Feb 21, 2021 at 10:33 AM Jim Shu <cwshu@andestech.com> wrote:
>
> Sorry for sending this patch set again.
> The cover letter of my previous mail doesn't add cc list.
> ---
>
> Current implementation of PMP permission checking only has effect when
> softmmu's TLB miss. PMP checking is bypassed when TLB hits because TLB page
> permission isn't affected by PMP permission.
>
> To fix this issue, this patch set addes the feature to propagate PMP
> permission to the TLB page and flush TLB pages if PMP permission has
> been changed.
>
> The patch set is tested on Zephyr RTOS userspace testsuite on QEMU riscv32
> virt machine.
>
> Jim Shu (3):
>   target/riscv: propagate PMP permission to TLB page
>   target/riscv: add log of PMP permission checking
>   target/riscv: flush TLB pages if PMP permission has been changed

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/cpu_helper.c | 96 ++++++++++++++++++++++++++++++---------
>  target/riscv/pmp.c        | 84 +++++++++++++++++++++++++---------
>  target/riscv/pmp.h        |  4 +-
>  3 files changed, 141 insertions(+), 43 deletions(-)
>
> --
> 2.30.1
>
>