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[PATCH v4 01/16] hw/riscv: Expand the is 32-bit check to support more CP
From: |
Alistair Francis |
Subject: |
[PATCH v4 01/16] hw/riscv: Expand the is 32-bit check to support more CPUs |
Date: |
Wed, 16 Dec 2020 10:22:26 -0800 |
Currently the riscv_is_32_bit() function only supports the generic rv32
CPUs. Extend the function to support the SiFive and LowRISC CPUs as
well.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
hw/riscv/boot.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index d62f3dc758..3c70ac75d7 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -41,7 +41,17 @@
bool riscv_is_32_bit(MachineState *machine)
{
- if (!strncmp(machine->cpu_type, "rv32", 4)) {
+ /*
+ * To determine if the CPU is 32-bit we need to check a few different CPUs.
+ *
+ * If the CPU starts with rv32
+ * If the CPU is a sifive 3 seriries CPU (E31, U34)
+ * If it's the Ibex CPU
+ */
+ if (!strncmp(machine->cpu_type, "rv32", 4) ||
+ (!strncmp(machine->cpu_type, "sifive", 6) &&
+ machine->cpu_type[8] == '3') ||
+ !strncmp(machine->cpu_type, "lowrisc-ibex", 12)) {
return true;
} else {
return false;
--
2.29.2
- [PATCH v4 00/16] RISC-V: Start to remove xlen preprocess, Alistair Francis, 2020/12/16
- [PATCH v4 02/16] target/riscv: Add a TYPE_RISCV_CPU_BASE CPU, Alistair Francis, 2020/12/16
- [PATCH v4 03/16] riscv: spike: Remove target macro conditionals, Alistair Francis, 2020/12/16
- [PATCH v4 01/16] hw/riscv: Expand the is 32-bit check to support more CPUs,
Alistair Francis <=
- [PATCH v4 04/16] riscv: virt: Remove target macro conditionals, Alistair Francis, 2020/12/16
- [PATCH v4 05/16] hw/riscv: boot: Remove compile time XLEN checks, Alistair Francis, 2020/12/16
- [PATCH v4 06/16] hw/riscv: virt: Remove compile time XLEN checks, Alistair Francis, 2020/12/16
- [PATCH v4 07/16] hw/riscv: spike: Remove compile time XLEN checks, Alistair Francis, 2020/12/16
- [PATCH v4 08/16] hw/riscv: sifive_u: Remove compile time XLEN checks, Alistair Francis, 2020/12/16
- [PATCH v4 09/16] target/riscv: fpu_helper: Match function defs in HELPER macros, Alistair Francis, 2020/12/16
- [PATCH v4 10/16] target/riscv: Add a riscv_cpu_is_32bit() helper function, Alistair Francis, 2020/12/16
- [PATCH v4 11/16] target/riscv: Specify the XLEN for CPUs, Alistair Francis, 2020/12/16
- [PATCH v4 12/16] target/riscv: cpu: Remove compile time XLEN checks, Alistair Francis, 2020/12/16