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Re: [PATCH v2 11/15] target/riscv: Specify the XLEN for CPUs


From: Richard Henderson
Subject: Re: [PATCH v2 11/15] target/riscv: Specify the XLEN for CPUs
Date: Wed, 9 Dec 2020 10:03:12 -0600
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 12/8/20 4:56 PM, Alistair Francis wrote:
> +#ifdef TARGET_RISCV64
> +static void rv64_sifive_u_cpu_init(Object *obj)
>  {
>      CPURISCVState *env = &RISCV_CPU(obj)->env;
> -    set_misa(env, RVXLEN | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
> +    set_misa(env, RV64 | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
>      set_priv_version(env, PRIV_VERSION_1_10_0);
>  }
>  
> -static void rvxx_sifive_e_cpu_init(Object *obj)
> +static void rv64_sifive_e_cpu_init(Object *obj)
>  {
>      CPURISCVState *env = &RISCV_CPU(obj)->env;
> -    set_misa(env, RVXLEN | RVI | RVM | RVA | RVC | RVU);
> +    set_misa(env, RV64 | RVI | RVM | RVA | RVC | RVU);
>      set_priv_version(env, PRIV_VERSION_1_10_0);
>      qdev_prop_set_bit(DEVICE(obj), "mmu", false);
>  }
> +#else

I guess it isn't much duplication, but you could retain the rvxx functions and
pass in xlen as an argument.  Either way,

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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