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Re: [PATCH v1 10/16] target/riscv: Specify the XLEN for CPUs
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From: |
Bin Meng |
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Subject: |
Re: [PATCH v1 10/16] target/riscv: Specify the XLEN for CPUs |
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Date: |
Mon, 26 Oct 2020 16:56:13 +0800 |
On Fri, Oct 23, 2020 at 11:45 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> target/riscv/cpu.c | 33 +++++++++++++++++++++++----------
> 1 file changed, 23 insertions(+), 10 deletions(-)
>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
- Re: [PATCH v1 06/16] hw/riscv: spike: Remove compile time XLEN checks, (continued)
- [PATCH v1 07/16] hw/riscv: sifive_u: Remove compile time XLEN checks, Alistair Francis, 2020/10/23
- [PATCH v1 08/16] target/riscv: fpu_helper: Match function defs in HELPER macros, Alistair Francis, 2020/10/23
- [PATCH v1 09/16] target/riscv: Add a riscv_cpu_is_32bit() helper function, Alistair Francis, 2020/10/23
- [PATCH v1 10/16] target/riscv: Specify the XLEN for CPUs, Alistair Francis, 2020/10/23
- Re: [PATCH v1 10/16] target/riscv: Specify the XLEN for CPUs,
Bin Meng <=
- [PATCH v1 11/16] target/riscv: cpu: Remove compile time XLEN checks, Alistair Francis, 2020/10/23
- [PATCH v1 12/16] target/riscv: cpu_helper: Remove compile time XLEN checks, Alistair Francis, 2020/10/23
- [PATCH v1 15/16] target/riscv: Convert the get/set_field() to support 64-bit values, Alistair Francis, 2020/10/23
- [PATCH v1 13/16] target/riscv: csr: Remove compile time XLEN checks, Alistair Francis, 2020/10/23
- [PATCH v1 16/16] target/riscv: Consolidate *statush registers, Alistair Francis, 2020/10/23