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Re: [RFC v2 40/76] target/riscv: rvv-0.9: floating-point move instructio


From: Richard Henderson
Subject: Re: [RFC v2 40/76] target/riscv: rvv-0.9: floating-point move instruction
Date: Thu, 30 Jul 2020 13:05:33 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 7/30/20 12:57 PM, Richard Henderson wrote:
> On 7/22/20 2:16 AM, frank.chang@sifive.com wrote:
>> +                (s->sew < MO_32)) {
>> +                /* SEW < FLEN */
>> +                TCGv_i64 t1 = tcg_temp_new_i64();
>> +                TCGv_i32 sew = tcg_const_i32(1 << (s->sew + 3));
>> +                gen_helper_narrower_nanbox_fpr(t1, cpu_fpr[a->rs1],
>> +                                               sew, cpu_env);
> 
> Also, while there is currently one function, gen_nanbox_s, you'll want to add
> gen_nanbox_h to match.

Oops, I forgot which way your helper worked.
The correct function is gen_check_nanbox_s.


r~



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