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[RFC v2 70/76] softfloat: add fp16 and uint8/int8 interconvert functions
From: |
frank . chang |
Subject: |
[RFC v2 70/76] softfloat: add fp16 and uint8/int8 interconvert functions |
Date: |
Wed, 22 Jul 2020 17:16:33 +0800 |
From: Frank Chang <frank.chang@sifive.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
fpu/softfloat.c | 34 ++++++++++++++++++++++++++++++++++
include/fpu/softfloat.h | 8 ++++++++
2 files changed, 42 insertions(+)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index e1661f22a5..89634267db 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -2142,6 +2142,13 @@ static int64_t round_to_int_and_pack(FloatParts in,
FloatRoundMode rmode,
}
}
+int8_t float16_to_int8_scalbn(float16 a, FloatRoundMode rmode, int scale,
+ float_status *s)
+{
+ return round_to_int_and_pack(float16_unpack_canonical(a, s),
+ rmode, scale, INT8_MIN, INT8_MAX, s);
+}
+
int16_t float16_to_int16_scalbn(float16 a, FloatRoundMode rmode, int scale,
float_status *s)
{
@@ -2205,6 +2212,11 @@ int64_t float64_to_int64_scalbn(float64 a,
FloatRoundMode rmode, int scale,
rmode, scale, INT64_MIN, INT64_MAX, s);
}
+int8_t float16_to_int8(float16 a, float_status *s)
+{
+ return float16_to_int8_scalbn(a, s->float_rounding_mode, 0, s);
+}
+
int16_t float16_to_int16(float16 a, float_status *s)
{
return float16_to_int16_scalbn(a, s->float_rounding_mode, 0, s);
@@ -2355,6 +2367,13 @@ static uint64_t round_to_uint_and_pack(FloatParts in,
FloatRoundMode rmode,
}
}
+uint8_t float16_to_uint8_scalbn(float16 a, FloatRoundMode rmode, int scale,
+ float_status *s)
+{
+ return round_to_uint_and_pack(float16_unpack_canonical(a, s),
+ rmode, scale, UINT8_MAX, s);
+}
+
uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode rmode, int scale,
float_status *s)
{
@@ -2418,6 +2437,11 @@ uint64_t float64_to_uint64_scalbn(float64 a,
FloatRoundMode rmode, int scale,
rmode, scale, UINT64_MAX, s);
}
+uint8_t float16_to_uint8(float16 a, float_status *s)
+{
+ return float16_to_uint8_scalbn(a, s->float_rounding_mode, 0, s);
+}
+
uint16_t float16_to_uint16(float16 a, float_status *s)
{
return float16_to_uint16_scalbn(a, s->float_rounding_mode, 0, s);
@@ -2572,6 +2596,11 @@ float16 int16_to_float16(int16_t a, float_status *status)
return int64_to_float16_scalbn(a, 0, status);
}
+float16 int8_to_float16(int8_t a, float_status *status)
+{
+ return int64_to_float16_scalbn(a, 0, status);
+}
+
float32 int64_to_float32_scalbn(int64_t a, int scale, float_status *status)
{
FloatParts pa = int_to_float(a, scale, status);
@@ -2697,6 +2726,11 @@ float16 uint16_to_float16(uint16_t a, float_status
*status)
return uint64_to_float16_scalbn(a, 0, status);
}
+float16 uint8_to_float16(uint8_t a, float_status *status)
+{
+ return uint64_to_float16_scalbn(a, 0, status);
+}
+
float32 uint64_to_float32_scalbn(uint64_t a, int scale, float_status *status)
{
FloatParts pa = uint_to_float(a, scale, status);
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 078cad8ad9..5700d2024b 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -136,9 +136,11 @@ float16 uint16_to_float16_scalbn(uint16_t a, int,
float_status *status);
float16 uint32_to_float16_scalbn(uint32_t a, int, float_status *status);
float16 uint64_to_float16_scalbn(uint64_t a, int, float_status *status);
+float16 int8_to_float16(int8_t a, float_status *status);
float16 int16_to_float16(int16_t a, float_status *status);
float16 int32_to_float16(int32_t a, float_status *status);
float16 int64_to_float16(int64_t a, float_status *status);
+float16 uint8_to_float16(uint8_t a, float_status *status);
float16 uint16_to_float16(uint16_t a, float_status *status);
float16 uint32_to_float16(uint32_t a, float_status *status);
float16 uint64_to_float16(uint64_t a, float_status *status);
@@ -187,10 +189,13 @@ float32 float16_to_float32(float16, bool ieee,
float_status *status);
float16 float64_to_float16(float64 a, bool ieee, float_status *status);
float64 float16_to_float64(float16 a, bool ieee, float_status *status);
+int8_t float16_to_int8_scalbn(float16, FloatRoundMode, int,
+ float_status *status);
int16_t float16_to_int16_scalbn(float16, FloatRoundMode, int, float_status *);
int32_t float16_to_int32_scalbn(float16, FloatRoundMode, int, float_status *);
int64_t float16_to_int64_scalbn(float16, FloatRoundMode, int, float_status *);
+int8_t float16_to_int8(float16, float_status *status);
int16_t float16_to_int16(float16, float_status *status);
int32_t float16_to_int32(float16, float_status *status);
int64_t float16_to_int64(float16, float_status *status);
@@ -199,6 +204,8 @@ int16_t float16_to_int16_round_to_zero(float16,
float_status *status);
int32_t float16_to_int32_round_to_zero(float16, float_status *status);
int64_t float16_to_int64_round_to_zero(float16, float_status *status);
+uint8_t float16_to_uint8_scalbn(float16 a, FloatRoundMode,
+ int, float_status *status);
uint16_t float16_to_uint16_scalbn(float16 a, FloatRoundMode,
int, float_status *status);
uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode,
@@ -206,6 +213,7 @@ uint32_t float16_to_uint32_scalbn(float16 a, FloatRoundMode,
uint64_t float16_to_uint64_scalbn(float16 a, FloatRoundMode,
int, float_status *status);
+uint8_t float16_to_uint8(float16 a, float_status *status);
uint16_t float16_to_uint16(float16 a, float_status *status);
uint32_t float16_to_uint32(float16 a, float_status *status);
uint64_t float16_to_uint64(float16 a, float_status *status);
--
2.17.1
- [RFC v2 64/76] target/riscv: rvv-0.9: single-width scaling shift instructions, (continued)
- [RFC v2 64/76] target/riscv: rvv-0.9: single-width scaling shift instructions, frank . chang, 2020/07/22
- [RFC v2 65/76] target/riscv: rvv-0.9: remove widening saturating scaled multiply-add, frank . chang, 2020/07/22
- [RFC v2 66/76] target/riscv: rvv-0.9: remove vmford.vv and vmford.vf, frank . chang, 2020/07/22
- [RFC v2 67/76] target/riscv: rvv-0.9: remove integer extract instruction, frank . chang, 2020/07/22
- [RFC v2 68/76] fpu: add api to handle alternative sNaN propagation, frank . chang, 2020/07/22
- [RFC v2 69/76] target/riscv: rvv-0.9: floating-point min/max instructions, frank . chang, 2020/07/22
- [RFC v2 70/76] softfloat: add fp16 and uint8/int8 interconvert functions,
frank . chang <=
- [RFC v2 71/76] target/riscv: rvv-0.9: widening floating-point/integer type-convert, frank . chang, 2020/07/22
- [RFC v2 72/76] target/riscv: rvv-0.9: narrowing floating-point/integer type-convert, frank . chang, 2020/07/22
- [RFC v2 73/76] fpu: fix float16 nan check, frank . chang, 2020/07/22
- [RFC v2 74/76] target/riscv: gdb: modify gdb csr xml file to align with csr register map, frank . chang, 2020/07/22
- [RFC v2 75/76] target/riscv: gdb: support vector registers for rv64, frank . chang, 2020/07/22
- [RFC v2 76/76] target/riscv: gdb: support vector registers for rv32, frank . chang, 2020/07/22