[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v5 11/11] target/riscv: Use a smaller guess size for no-MMU PMP
|
From: |
Alistair Francis |
|
Subject: |
[PATCH v5 11/11] target/riscv: Use a smaller guess size for no-MMU PMP |
|
Date: |
Thu, 28 May 2020 15:14:36 -0700 |
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
---
target/riscv/pmp.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 0e6b640fbd..9418660f1b 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -233,12 +233,16 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
return true;
}
- /*
- * if size is unknown (0), assume that all bytes
- * from addr to the end of the page will be accessed.
- */
if (size == 0) {
- pmp_size = -(addr | TARGET_PAGE_MASK);
+ if (riscv_feature(env, RISCV_FEATURE_MMU)) {
+ /*
+ * If size is unknown (0), assume that all bytes
+ * from addr to the end of the page will be accessed.
+ */
+ pmp_size = -(addr | TARGET_PAGE_MASK);
+ } else {
+ pmp_size = sizeof(target_ulong);
+ }
} else {
pmp_size = size;
}
--
2.26.2
- [PATCH v5 00/11] RISC-V Add the OpenTitan Machine, Alistair Francis, 2020/05/28
- [PATCH v5 02/11] target/riscv: Don't overwrite the reset vector, Alistair Francis, 2020/05/28
- [PATCH v5 01/11] riscv/boot: Add a missing header include, Alistair Francis, 2020/05/28
- [PATCH v5 03/11] target/riscv: Disable the MMU correctly, Alistair Francis, 2020/05/28
- [PATCH v5 04/11] target/riscv: Don't set PMP feature in the cpu init, Alistair Francis, 2020/05/28
- [PATCH v5 05/11] target/riscv: Add the lowRISC Ibex CPU, Alistair Francis, 2020/05/28
- [PATCH v5 06/11] riscv: Initial commit of OpenTitan machine, Alistair Francis, 2020/05/28
- [PATCH v5 11/11] target/riscv: Use a smaller guess size for no-MMU PMP,
Alistair Francis <=
- [PATCH v5 08/11] hw/intc: Initial commit of lowRISC Ibex PLIC, Alistair Francis, 2020/05/28
- [PATCH v5 09/11] riscv/opentitan: Connect the PLIC device, Alistair Francis, 2020/05/28
- [PATCH v5 07/11] hw/char: Initial commit of Ibex UART, Alistair Francis, 2020/05/28
- [PATCH v5 10/11] riscv/opentitan: Connect the UART device, Alistair Francis, 2020/05/28