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Re: [PATCH v5 38/60] target/riscv: vector floating-point compare instruc
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH v5 38/60] target/riscv: vector floating-point compare instructions |
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Date: |
Sat, 14 Mar 2020 02:08:32 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 |
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +static uint8_t float16_eq_quiet(uint16_t a, uint16_t b, float_status *s)
> +{
> + int compare = float16_compare_quiet(a, b, s);
> + if (compare == float_relation_equal) {
> + return 1;
> + } else {
> + return 0;
> + }
> +}
You really need remember that boolean results in C are 1 and 0.
You do not need to keep translating true to 1 and false to 0.
> +static uint8_t vmfne16(uint16_t a, uint16_t b, float_status *s)
> +{
> + int compare = float16_compare_quiet(a, b, s);
> + if (compare != float_relation_equal &&
> + compare != float_relation_unordered) {
Indentation.
> +static uint8_t float16_le(uint16_t a, uint16_t b, float_status *s)
> +{
> + int compare = float16_compare(a, b, s);
> + if (compare == float_relation_less ||
> + compare == float_relation_equal) {
> + return 1;
Indentation.
r~
- [PATCH v5 33/60] target/riscv: vector single-width floating-point fused multiply-add instructions, (continued)
- [PATCH v5 33/60] target/riscv: vector single-width floating-point fused multiply-add instructions, LIU Zhiwei, 2020/03/12
- [PATCH v5 34/60] target/riscv: vector widening floating-point fused multiply-add instructions, LIU Zhiwei, 2020/03/12
- [PATCH v5 35/60] target/riscv: vector floating-point square-root instruction, LIU Zhiwei, 2020/03/12
- [PATCH v5 36/60] target/riscv: vector floating-point min/max instructions, LIU Zhiwei, 2020/03/12
- [PATCH v5 37/60] target/riscv: vector floating-point sign-injection instructions, LIU Zhiwei, 2020/03/12
- [PATCH v5 38/60] target/riscv: vector floating-point compare instructions, LIU Zhiwei, 2020/03/12
- Re: [PATCH v5 38/60] target/riscv: vector floating-point compare instructions,
Richard Henderson <=
- [PATCH v5 39/60] target/riscv: vector floating-point classify instructions, LIU Zhiwei, 2020/03/12
- [PATCH v5 40/60] target/riscv: vector floating-point merge instructions, LIU Zhiwei, 2020/03/12
[PATCH v5 41/60] target/riscv: vector floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/12