Re: [PATCH v5 08/60] target/riscv: add vector amo operations

qemu-riscv

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Re: [PATCH v5 08/60] target/riscv: add vector amo operations

From:	LIU Zhiwei
Subject:	Re: [PATCH v5 08/60] target/riscv: add vector amo operations
Date:	Sat, 14 Mar 2020 13:07:04 +0800
User-agent:	Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0



On 2020/3/14 12:28, Richard Henderson wrote:

On 3/12/20 7:58 AM, LIU Zhiwei wrote:

+    static gen_helper_amo *const fnsw[9] = {

...

+    static gen_helper_amo *const fnsd[18] = {

...

+        fn = fnsw[seq];
+#ifdef TARGET_RISCV64
+        if (s->sew == 3) {
+            fn = fnsd[seq];
+
+#endif

This indexing is wrong, since for seq == 11 you index past the end of fnsw[].

Yes, it really a security bug.  Thanks for pointing that.

Zhiwei

You need something like

     if (s->sew == 3) {
#ifdef TARGET_RISCV64
         fn = fnsd[seq];
#else
         /* Check done in amo_check(). */
         g_assert_not_reached();
#endif
     } else {
         fn = fnsw[seq];
     }
Otherwise it looks ok.


r~

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Re: [PATCH v5 06/60] target/riscv: add vector index load and store instructions, (continued)
- [PATCH v5 07/60] target/riscv: add fault-only-first unit stride load, LIU Zhiwei, 2020/03/12
  - Re: [PATCH v5 07/60] target/riscv: add fault-only-first unit stride load, Alistair Francis, 2020/03/13
    - Re: [PATCH v5 07/60] target/riscv: add fault-only-first unit stride load, LIU Zhiwei, 2020/03/13
  - Re: [PATCH v5 07/60] target/riscv: add fault-only-first unit stride load, Richard Henderson, 2020/03/13
- [PATCH v5 08/60] target/riscv: add vector amo operations, LIU Zhiwei, 2020/03/12
  - Re: [PATCH v5 08/60] target/riscv: add vector amo operations, Alistair Francis, 2020/03/13
    - Re: [PATCH v5 08/60] target/riscv: add vector amo operations, LIU Zhiwei, 2020/03/13
  - Re: [PATCH v5 08/60] target/riscv: add vector amo operations, Richard Henderson, 2020/03/14
    - Re: [PATCH v5 08/60] target/riscv: add vector amo operations, LIU Zhiwei <=
- [PATCH v5 09/60] target/riscv: vector single-width integer add and subtract, LIU Zhiwei, 2020/03/12
  - Re: [PATCH v5 09/60] target/riscv: vector single-width integer add and subtract, Richard Henderson, 2020/03/14
    - Re: [PATCH v5 09/60] target/riscv: vector single-width integer add and subtract, LIU Zhiwei, 2020/03/14
    - Re: [PATCH v5 09/60] target/riscv: vector single-width integer add and subtract, LIU Zhiwei, 2020/03/23
    - Re: [PATCH v5 09/60] target/riscv: vector single-width integer add and subtract, Richard Henderson, 2020/03/23
- [PATCH v5 10/60] target/riscv: vector widening integer add and subtract, LIU Zhiwei, 2020/03/12
  - Re: [PATCH v5 10/60] target/riscv: vector widening integer add and subtract, Richard Henderson, 2020/03/14
- [PATCH v5 11/60] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions, LIU Zhiwei, 2020/03/12
  - Re: [PATCH v5 11/60] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions, Richard Henderson, 2020/03/14
    - Re: [PATCH v5 11/60] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions, LIU Zhiwei, 2020/03/14

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