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Re: [PATCH] riscv: virt: Allow PCI address 0


From: Palmer Dabbelt
Subject: Re: [PATCH] riscv: virt: Allow PCI address 0
Date: Tue, 18 Feb 2020 08:30:19 -0800 (PST)

On Sun, 02 Feb 2020 07:41:25 PST (-0800), address@hidden wrote:
Hi Palmer,

On Sat, Nov 23, 2019 at 6:41 AM Palmer Dabbelt <address@hidden> wrote:

On Fri, 22 Nov 2019 07:27:52 PST (-0800), address@hidden wrote:
> When testing e1000 with the virt machine, e1000's I/O space cannot
> be accessed. Debugging shows that the I/O BAR (BAR1) is correctly
> written with address 0 plus I/O enable bit, but QEMU's "info pci"
> shows that:
>
>   Bus  0, device   1, function 0:
>     Ethernet controller: PCI device 8086:100e
>   ...
>       BAR1: I/O at 0xffffffffffffffff [0x003e].
>   ...
>
> It turns out we should set pci_allow_0_address to true to allow 0
> PCI address, otherwise pci_bar_address() treats such address as
> PCI_BAR_UNMAPPED.
>
> Signed-off-by: Bin Meng <address@hidden>
> ---
>
>  hw/riscv/virt.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 23f340d..411bef5 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -603,6 +603,7 @@ static void riscv_virt_machine_class_init(ObjectClass 
*oc, void *data)
>      mc->init = riscv_virt_board_init;
>      mc->max_cpus = 8;
>      mc->default_cpu_type = VIRT_CPU;
> +    mc->pci_allow_0_address = true;
>  }
>
>  static const TypeInfo riscv_virt_machine_typeinfo = {

Reviewed-by: Palmer Dabbelt <address@hidden>

I've put this on for-next, as I don't think this is 4.2 material.

Looks you missed picking up this one :(

Sorry about that, it's back on for-master.



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