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[Qemu-riscv] [PATCH 0/3] decodetree improvements

From: Richard Henderson
Subject: [Qemu-riscv] [PATCH 0/3] decodetree improvements
Date: Fri, 9 Aug 2019 08:41:50 -0700

These are split out from my decodetree coversion of the AArch32
base instruction sets.

The first patch has been tidied per review from Peter.  I now
diagnose nonsense fields containing no bits.  I eliminated the
unused integer argument passed to the named function.  I improved
the documentation.

The second patch is new, a suggestion from Phillipe.  This then
enables the third patch, tidying up the existing usage in riscv.


Richard Henderson (3):
  decodetree: Allow !function with no input bits
  decodetree: Suppress redundant declaration warnings
  target/riscv: Remove redundant declaration pragmas

 target/riscv/translate.c          | 19 +-------
 docs/devel/decodetree.rst         |  8 +++-
 scripts/decodetree.py             | 76 ++++++++++++++++++++++++++-----
 tests/decode/err_field6.decode    |  5 ++
 tests/decode/succ_function.decode |  6 +++
 5 files changed, 83 insertions(+), 31 deletions(-)
 create mode 100644 tests/decode/err_field6.decode
 create mode 100644 tests/decode/succ_function.decode


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