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Re: [Qemu-riscv] [PATCH for 4.1] RISC-V: Ignore the S and U extensions w

From: Paul Walmsley
Subject: Re: [Qemu-riscv] [PATCH for 4.1] RISC-V: Ignore the S and U extensions when formatting ISA strings
Date: Wed, 7 Aug 2019 08:27:30 -0700 (PDT)
User-agent: Alpine 2.21.9999 (DEB 301 2018-08-15)

On Wed, 7 Aug 2019, Palmer Dabbelt wrote:

> The ISA strings we're providing from QEMU aren't actually legal RISC-V
> ISA strings, as both the S and U extensions cannot exist as
> single-letter extensions and must instead be multi-letter strings.
> We're still using the ISA strings inside QEMU to track the availiable
> extensions, so this patch just strips out the S and U extensions when
> formatting ISA strings.
> This boots Linux on top of 4.1-rc3, which no longer has the U extension
> in /proc/cpuinfo.
> Signed-off-by: Palmer Dabbelt <address@hidden>
> ---
> This is another late one, but I'd like to target it for 4.1 as we're
> providing illegal ISA strings and I don't want to bake that into a bunch
> of other code.

I'm unfamiliar with the underlying QEMU code beyond the patch posted here, 
but I can review the intention expressed in the patch description.  The 
described intent is aligned with Section 22.6 and Table 22.1 of the RISC-V 
User-Level ISA Specification version 2.2:


And on the Linux kernel side we've also recognized that our current 
parsing code is handling "s" and "u" incorrectly and that we'll need to 
fix it:


- Paul

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