qemu-riscv
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-riscv] [Qemu-devel] [PATCH 10/28] riscv: sifive_u: Remove the


From: Alistair Francis
Subject: Re: [Qemu-riscv] [Qemu-devel] [PATCH 10/28] riscv: sifive_u: Remove the unnecessary include of prci header
Date: Mon, 5 Aug 2019 17:18:03 -0700

On Mon, Aug 5, 2019 at 9:10 AM Bin Meng <address@hidden> wrote:
>
> sifive_u machine does not use PRCI as of today. Remove the prci
> header inclusion.
>
> Signed-off-by: Bin Meng <address@hidden>

Reviewed-by: Alistair Francis <address@hidden>

Alistair

> ---
>
>  hw/riscv/sifive_u.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 9f05e09..dfcb525 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -40,7 +40,6 @@
>  #include "hw/riscv/sifive_plic.h"
>  #include "hw/riscv/sifive_clint.h"
>  #include "hw/riscv/sifive_uart.h"
> -#include "hw/riscv/sifive_prci.h"
>  #include "hw/riscv/sifive_u.h"
>  #include "hw/riscv/boot.h"
>  #include "chardev/char.h"
> --
> 2.7.4
>
>



reply via email to

[Prev in Thread] Current Thread [Next in Thread]