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Re: [Qemu-riscv] [Qemu-devel] [PATCH-4.2 v1 3/6] riscv: plic: Remove unu
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From: |
Philippe Mathieu-Daudé |
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Subject: |
Re: [Qemu-riscv] [Qemu-devel] [PATCH-4.2 v1 3/6] riscv: plic: Remove unused interrupt functions |
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Date: |
Mon, 29 Jul 2019 16:28:50 +0200 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 |
On 7/25/19 8:52 PM, Alistair Francis wrote:
> Signed-off-by: Alistair Francis <address@hidden>
> ---
> hw/riscv/sifive_plic.c | 12 ------------
> include/hw/riscv/sifive_plic.h | 3 ---
> 2 files changed, 15 deletions(-)
>
> diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c
> index 0950e89e15..864a1bed42 100644
> --- a/hw/riscv/sifive_plic.c
> +++ b/hw/riscv/sifive_plic.c
> @@ -161,18 +161,6 @@ static void sifive_plic_update(SiFivePLICState *plic)
> }
> }
>
> -void sifive_plic_raise_irq(SiFivePLICState *plic, uint32_t irq)
> -{
> - sifive_plic_set_pending(plic, irq, true);
> - sifive_plic_update(plic);
> -}
> -
> -void sifive_plic_lower_irq(SiFivePLICState *plic, uint32_t irq)
> -{
> - sifive_plic_set_pending(plic, irq, false);
> - sifive_plic_update(plic);
> -}
> -
> static uint32_t sifive_plic_claim(SiFivePLICState *plic, uint32_t addrid)
> {
> int i, j;
> diff --git a/include/hw/riscv/sifive_plic.h b/include/hw/riscv/sifive_plic.h
> index ce8907f6aa..3b8a623919 100644
> --- a/include/hw/riscv/sifive_plic.h
> +++ b/include/hw/riscv/sifive_plic.h
> @@ -69,9 +69,6 @@ typedef struct SiFivePLICState {
> uint32_t aperture_size;
> } SiFivePLICState;
>
> -void sifive_plic_raise_irq(SiFivePLICState *plic, uint32_t irq);
> -void sifive_plic_lower_irq(SiFivePLICState *plic, uint32_t irq);
> -
> DeviceState *sifive_plic_create(hwaddr addr, char *hart_config,
> uint32_t num_sources, uint32_t num_priorities,
> uint32_t priority_base, uint32_t pending_base,
>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
[Qemu-riscv] [PATCH-4.2 v1 3/6] riscv: plic: Remove unused interrupt functions, Alistair Francis, 2019/07/25
[Qemu-riscv] [PATCH-4.2 v1 4/6] target/riscv: Create function to test if FP is enabled, Alistair Francis, 2019/07/25
[Qemu-riscv] [PATCH-4.2 v1 5/6] target/riscv: Update the Hypervisor CSRs to v0.4, Alistair Francis, 2019/07/25