On 6/16/19 12:19 PM, Joel Sing wrote:
> + /*
> + * Clear the load reservation, since an SC must fail if there is
> + * an SC to any address, in between an LR and SC pair.
> + */
> + tcg_gen_movi_tl(load_res, 0);
This clear needs to be moved down below label l2.
Otherwise, with lr / sc / sc, the second sc could succeed in error.
FWIW, other targets have used -1 as the "invalid" load reservation, since the
architecture does not require address 0 to be unmapped. This should be quite
visible in M-mode with paging disabled and ram at offset 0. Often, other
targets require alignment for the lr/sc address, though I don't see that for riscv.
Joel: can you submit this with a "Signed-off-by" line? There's only a week until the soft freeze, and I'd really like this in if possible. It'd be great if you could fix up the other issues, but I can't even do that myself without a SOB.