Re: [Qemu-riscv] [Qemu-devel] [PATCH] riscv: Add proper alignment check and pending 'C' extension upon misa writes

[Eric Blake]

On 2/22/19 10:25 AM, address@hidden wrote:
> From: ahmed_magdy <address@hidden>
> 
> Signed-off-by: ahmed_magdy <address@hidden>

This appears to be your first contribution to qemu. Welcome to the
community!

Typically, a Signed-off-by designation should be a proper name (what you
would sign a legal document with, as it has a legal significance on your
right to contribute the code).  Using all lowercase and _ instead of
space looks like a username, and while I am not one to tell you it can't
be a legal name, it is unusual enough to at least raise my suspicions.

Furthermore, your commit message doesn't give any details beyond the
"what" in the subject line. The body of the commit message should
explain the "why" (what bug are you fixing, how to reproduce it), so
that a reviewer stands a chance of determining if the code matches the
description you gave, and if the issue you describe really does warrant
the inclusion of your patch.  You gave a brief "why" in your cover letter:

"I'm submiting this patch to properly check the next instruction
alignment and scheduale compression extenstion enable upon 'MISA'
register writes to later aligned instruction through exporting next
instruction 'pc' to riscv cpu state"

where it would be wise to include an improved version of that text with
this commit proper (since the cover letter does not get applied to git).
 For that matter, when sending a single patch, a cover letter is
optional (it is only mandatory when sending a multi-patch series).

For more patch submission hints, see:
https://wiki.qemu.org/Contribute/SubmitAPatch

-- 
Eric Blake, Principal Software Engineer
Red Hat, Inc.           +1-919-301-3226
Virtualization:  qemu.org | libvirt.org