Re: [Qemu-riscv] [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
81ebc7cd30 target/riscv: Remaining rvc insn reuse 32 bit translators
07c0cfd32c target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
e1f0bb51b9 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
b35997f8d2 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
8bc9b0b985 target/riscv: Convert @cs_2 insns to share translation functions
e003dc6ca8 target/riscv: Remove decode_RV32_64G()
4a325930d3 target/riscv: Remove gen_system()
cb52b1ea61 target/riscv: Rename trans_arith to gen_arith
ee5a645075 target/riscv: Remove manual decoding of RV32/64M insn
b3a87befcc target/riscv: Remove shift and slt insn manual decoding
f18704ce0f target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
d0a25b0fa4 target/riscv: Move gen_arith_imm() decoding into trans_* functions
2ca46e9bed target/riscv: Remove manual decoding from gen_store()
78512d19df target/riscv: Remove manual decoding from gen_load()
212a925137 target/riscv: Remove manual decoding from gen_branch()
2b7cdb3297 target/riscv: Remove gen_jalr()
1c3aa40166 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
93939ee9a2 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
117f7383e4 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
1dc304a953 target/riscv: Convert RV priv insns to decodetree
21873b847a target/riscv: Convert RV64D insns to decodetree
3bb9e01535 target/riscv: Convert RV32D insns to decodetree
25fd78228e target/riscv: Convert RV64F insns to decodetree
0ec4580130 target/riscv: Convert RV32F insns to decodetree
b688a74af7 target/riscv: Convert RV64A insns to decodetree
3e3b876eef target/riscv: Convert RV32A insns to decodetree
4c96ccaa38 target/riscv: Convert RVXM insns to decodetree
8d3945144d target/riscv: Convert RVXI csr insns to decodetree
372c0bd66c target/riscv: Convert RVXI fence insns to decodetree
63bab5f9af target/riscv: Convert RVXI arithmetic insns to decodetree
6b13955854 target/riscv: Convert RV64I load/store insns to decodetree
b462b29190 target/riscv: Convert RV32I load/store insns to decodetree
fef88e3955 target/riscv: Convert RVXI branch insns to decodetree
9a7b36e97b target/riscv: Activate decodetree and implemnt LUI & AUIPC
4acf01bc5b target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 4acf01bc5ba3 (target/riscv: Move CPURISCVState pointer to 
DisasContext)
2/35 Checking commit 9a7b36e97b24 (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
new file mode 100644

ERROR: externs should be avoided in .c files
#124: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit fef88e3955da (target/riscv: Convert RVXI branch insns to 
decodetree)
4/35 Checking commit b462b29190b0 (target/riscv: Convert RV32I load/store insns 
to decodetree)
5/35 Checking commit 6b139558549d (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 63bab5f9af5b (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
7/35 Checking commit 372c0bd66ca4 (target/riscv: Convert RVXI fence insns to 
decodetree)
8/35 Checking commit 8d3945144df3 (target/riscv: Convert RVXI csr insns to 
decodetree)
9/35 Checking commit 4c96ccaa38ac (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#47: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 3e3b876eefdc (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#53: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit b688a74af7db (target/riscv: Convert RV64A insns to 
decodetree)
12/35 Checking commit 0ec45801301f (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#77: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 25fd78228e88 (target/riscv: Convert RV64F insns to 
decodetree)
14/35 Checking commit 3bb9e015352c (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#50: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 21873b847a17 (target/riscv: Convert RV64D insns to 
decodetree)
16/35 Checking commit 1dc304a95399 (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#40: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 117f7383e425 (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#30: 
new file mode 100644

ERROR: externs should be avoided in .c files
#245: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 93939ee9a2f4 (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
19/35 Checking commit 1c3aa4016671 (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
20/35 Checking commit 2b7cdb329758 (target/riscv: Remove gen_jalr())
21/35 Checking commit 212a9251371d (target/riscv: Remove manual decoding from 
gen_branch())
22/35 Checking commit 78512d19dfaa (target/riscv: Remove manual decoding from 
gen_load())
23/35 Checking commit 2ca46e9bed7b (target/riscv: Remove manual decoding from 
gen_store())
24/35 Checking commit d0a25b0fa47d (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
25/35 Checking commit f18704ce0f70 (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
26/35 Checking commit b3a87befcc10 (target/riscv: Remove shift and slt insn 
manual decoding)
27/35 Checking commit ee5a6450750b (target/riscv: Remove manual decoding of 
RV32/64M insn)
28/35 Checking commit cb52b1ea618e (target/riscv: Rename trans_arith to 
gen_arith)
29/35 Checking commit 4a325930d344 (target/riscv: Remove gen_system())
30/35 Checking commit e003dc6ca8be (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 8bc9b0b98553 (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

ERROR: externs should be avoided in .c files
#181: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit b35997f8d24a (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
33/35 Checking commit e1f0bb51b974 (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#27: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 07c0cfd32c28 (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
35/35 Checking commit 81ebc7cd3073 (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden