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From: | Richard Henderson |
Subject: | Re: [Qemu-riscv] [Qemu-devel] [RFC v1 21/23] tcg: Add RISC-V cpu signal handler |
Date: | Fri, 16 Nov 2018 18:29:13 +0100 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 |
On 11/15/18 11:37 PM, Alistair Francis wrote: > + /* Detect store by reading the instruction at the program > + counter. Note: we currently only generate 32-bit > + instructions so we thus only detect 32-bit stores */ Actually, you need to handle what the compiler generates too. So, if __riscv_compressed is defined, you need to handle it. r~
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