Re: [PATCH v2] hw/pci-host: Use register definitions from PCI standard

[Bernhard Beschow]

Am 5. Januar 2023 17:37:02 UTC schrieb "Philippe Mathieu-Daudé" 
<philmd@linaro.org>:
>No need to document magic values when the definition names
>from "standard-headers/linux/pci_regs.h" are self-explicit.
>
>Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>---
> hw/pci-host/grackle.c  |  2 +-
> hw/pci-host/raven.c    |  6 +++---
> hw/pci-host/uninorth.c | 33 +++++++++++----------------------
> 3 files changed, 15 insertions(+), 26 deletions(-)
>
>diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
>index 95945ac0f4..2a45cc13c3 100644
>--- a/hw/pci-host/grackle.c
>+++ b/hw/pci-host/grackle.c
>@@ -91,7 +91,7 @@ static void grackle_init(Object *obj)
> 
> static void grackle_pci_realize(PCIDevice *d, Error **errp)
> {
>-    d->config[0x09] = 0x01;
>+    d->config[PCI_CLASS_PROG] = 0x01;
> }
> 
> static void grackle_pci_class_init(ObjectClass *klass, void *data)
>diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c
>index 7a105e4a63..c47259a851 100644
>--- a/hw/pci-host/raven.c
>+++ b/hw/pci-host/raven.c
>@@ -329,9 +329,9 @@ static void raven_realize(PCIDevice *d, Error **errp)
>     char *filename;
>     int bios_size = -1;
> 
>-    d->config[0x0C] = 0x08; // cache_line_size
>-    d->config[0x0D] = 0x10; // latency_timer
>-    d->config[0x34] = 0x00; // capabilities_pointer
>+    d->config[PCI_CACHE_LINE_SIZE] = 0x08;
>+    d->config[PCI_LATENCY_TIMER] = 0x10;
>+    d->config[PCI_CAPABILITY_LIST] = 0x00;
> 
>     memory_region_init_rom_nomigrate(&s->bios, OBJECT(s), "bios", BIOS_SIZE,
>                                      &error_fatal);
>diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
>index 8396c91d59..38b38c8a00 100644
>--- a/hw/pci-host/uninorth.c
>+++ b/hw/pci-host/uninorth.c
>@@ -276,12 +276,9 @@ static void pci_unin_internal_init(Object *obj)
> 
> static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
> {
>-    /* cache_line_size */
>-    d->config[0x0C] = 0x08;
>-    /* latency_timer */
>-    d->config[0x0D] = 0x10;
>-    /* capabilities_pointer */
>-    d->config[0x34] = 0x00;
>+    d->config[PCI_CACHE_LINE_SIZE] = 0x08;
>+    d->config[PCI_LATENCY_TIMER] = 0x10;
>+    d->config[PCI_CAPABILITY_LIST] = 0x00;
> 
>     /*
>      * Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI
>@@ -296,30 +293,22 @@ static void unin_main_pci_host_realize(PCIDevice *d, 
>Error **errp)
> 
> static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
> {
>-    /* cache_line_size */
>-    d->config[0x0C] = 0x08;
>-    /* latency_timer */
>-    d->config[0x0D] = 0x10;
>-    /* capabilities_pointer
>-    d->config[0x34] = 0x80; */
>+    d->config[PCI_CACHE_LINE_SIZE] = 0x08;
>+    d->config[PCI_LATENCY_TIMER] = 0x10;
>+    /* d->config[PCI_CAPABILITY_LIST] = 0x80; */
> }
> 
> static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp)
> {
>-    /* cache line size */
>-    d->config[0x0C] = 0x08;
>-    /* latency timer */
>-    d->config[0x0D] = 0x10;
>+    d->config[PCI_CACHE_LINE_SIZE] = 0x08;
>+    d->config[PCI_LATENCY_TIMER] = 0x10;
> }
> 
> static void unin_internal_pci_host_realize(PCIDevice *d, Error **errp)
> {
>-    /* cache_line_size */
>-    d->config[0x0C] = 0x08;
>-    /* latency_timer */
>-    d->config[0x0D] = 0x10;
>-    /* capabilities_pointer */
>-    d->config[0x34] = 0x00;
>+    d->config[PCI_CACHE_LINE_SIZE] = 0x08;
>+    d->config[PCI_LATENCY_TIMER] = 0x10;
>+    d->config[PCI_CAPABILITY_LIST] = 0x00;
> }
> 
> static void unin_main_pci_host_class_init(ObjectClass *klass, void *data)

Reviewed-by: Bernhard Beschow <shentey@gmail.com>