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Re: [PATCH v5 0/6] ppc/e500: Add support for two types of flash, cleanup


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH v5 0/6] ppc/e500: Add support for two types of flash, cleanup
Date: Tue, 1 Nov 2022 18:56:17 +0100
User-agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.4.1

On 1/11/22 18:43, Philippe Mathieu-Daudé wrote:
On 1/11/22 17:58, Philippe Mathieu-Daudé wrote:
On 1/11/22 17:01, Bernhard Beschow wrote:
Am 1. November 2022 10:41:51 UTC schrieb Bernhard Beschow <shentey@gmail.com>:
On Mon, Oct 31, 2022 at 12:54 PM Philippe Mathieu-Daudé <philmd@linaro.org>
wrote:

This is a respin of Bernhard's v4 with Freescale eSDHC implemented
as an 'UNIMP' region. See v4 cover here:

https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shentey@gmail.com/

Hi Phil,

Is there a chance to get this in for 7.2?

Well 1/ can you review patch #1 and 2/ we need to figure out what to do with patch #2 :) Can you point me to the CCSR datasheet?

Maybe I found it, I'm looking at the "MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1".

On "Table 2-11. CCSR Block Base Address Map" I see the 0x2_7000–0x3_0FFF region marked as 'Reserved'. How does the eSDHC end mapped there?



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