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[PATCH v2 8/9] target/ppc: Implemented vector module word/doubleword
From: |
Lucas Mateus Castro(alqotel) |
Subject: |
[PATCH v2 8/9] target/ppc: Implemented vector module word/doubleword |
Date: |
Tue, 5 Apr 2022 16:55:57 -0300 |
From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>
Implement the following PowerISA v3.1 instructions:
vmodsw: Vector Modulo Signed Word
vmoduw: Vector Modulo Unsigned Word
vmodsd: Vector Modulo Signed Doubleword
vmodud: Vector Modulo Unsigned Doubleword
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
---
target/ppc/insn32.decode | 5 +++++
target/ppc/translate/vmx-impl.c.inc | 10 ++++++++++
2 files changed, 15 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 3eb920ac76..36b42e41d2 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -719,3 +719,8 @@ VDIVESD 000100 ..... ..... ..... 01111001011 @VX
VDIVEUD 000100 ..... ..... ..... 01011001011 @VX
VDIVESQ 000100 ..... ..... ..... 01100001011 @VX
VDIVEUQ 000100 ..... ..... ..... 01000001011 @VX
+
+VMODSW 000100 ..... ..... ..... 11110001011 @VX
+VMODUW 000100 ..... ..... ..... 11010001011 @VX
+VMODSD 000100 ..... ..... ..... 11111001011 @VX
+VMODUD 000100 ..... ..... ..... 11011001011 @VX
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index 23f215dbea..c5178a0f1e 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -3340,6 +3340,11 @@ static void do_diveu_i32(TCGv_i32 t, TCGv_i32 a,
TCGv_i32 b)
DO_VDIV_VMOD(do_divesw, 32, do_dives_i32, true)
DO_VDIV_VMOD(do_diveuw, 32, do_diveu_i32, false)
+DO_VDIV_VMOD(do_modsw, 32, tcg_gen_rem_i32, true)
+DO_VDIV_VMOD(do_moduw, 32, tcg_gen_remu_i32, false)
+DO_VDIV_VMOD(do_modsd, 64, tcg_gen_rem_i64, true)
+DO_VDIV_VMOD(do_modud, 64, tcg_gen_remu_i64, false)
+
TRANS_VDIV_VMOD(ISA310, VDIVESW, MO_32, do_divesw, NULL)
TRANS_VDIV_VMOD(ISA310, VDIVEUW, MO_32, do_diveuw, NULL)
TRANS_FLAGS2(ISA310, VDIVESD, do_vx_helper, gen_helper_VDIVESD)
@@ -3347,6 +3352,11 @@ TRANS_FLAGS2(ISA310, VDIVEUD, do_vx_helper,
gen_helper_VDIVEUD)
TRANS_FLAGS2(ISA310, VDIVESQ, do_vx_helper, gen_helper_VDIVESQ)
TRANS_FLAGS2(ISA310, VDIVEUQ, do_vx_helper, gen_helper_VDIVEUQ)
+TRANS_VDIV_VMOD(ISA310, VMODSW, MO_32, do_modsw , NULL)
+TRANS_VDIV_VMOD(ISA310, VMODUW, MO_32, do_moduw, NULL)
+TRANS_VDIV_VMOD(ISA310, VMODSD, MO_64, NULL, do_modsd)
+TRANS_VDIV_VMOD(ISA310, VMODUD, MO_64, NULL, do_modud)
+
#undef DO_VDIV_VMOD
#undef GEN_VR_LDX
--
2.31.1
- Re: [PATCH v2 2/9] target/ppc: Implemented vector divide instructions, (continued)
- [PATCH v2 3/9] target/ppc: Implemented vector divide quadword, Lucas Mateus Castro(alqotel), 2022/04/05
- [PATCH v2 4/9] target/ppc: Implemented vector divide extended word, Lucas Mateus Castro(alqotel), 2022/04/05
- [PATCH v2 6/9] host-utils: Implemented signed 256-by-128 division, Lucas Mateus Castro(alqotel), 2022/04/05
- [PATCH v2 5/9] host-utils: Implemented unsigned 256-by-128 division, Lucas Mateus Castro(alqotel), 2022/04/05
- [PATCH v2 7/9] target/ppc: Implemented remaining vector divide extended, Lucas Mateus Castro(alqotel), 2022/04/05
- [PATCH v2 8/9] target/ppc: Implemented vector module word/doubleword,
Lucas Mateus Castro(alqotel) <=
- [PATCH v2 9/9] target/ppc: Implemented vector module quadword, Lucas Mateus Castro(alqotel), 2022/04/05