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[PULL 12/54] target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c
From: |
David Gibson |
Subject: |
[PULL 12/54] target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c |
Date: |
Tue, 9 Nov 2021 16:51:22 +1100 |
From: Bruno Larsen <bruno.larsen@eldorado.org.br>
Move REQUIRE_ALTIVEC to translate.c and rename it to REQUIRE_VECTOR.
Signed-off-by: Bruno Larsen <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Signed-off-by: Fernando Valle <fernando.valle@eldorado.org.br>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20211029192417.400707-3-luis.pires@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/translate.c | 8 ++++++++
target/ppc/translate/vector-impl.c.inc | 10 +---------
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 8d5141497f..1d24b85746 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -7341,6 +7341,14 @@ static int times_16(DisasContext *ctx, int x)
# define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B)
#endif
+#define REQUIRE_VECTOR(CTX) \
+ do { \
+ if (unlikely(!(CTX)->altivec_enabled)) { \
+ gen_exception((CTX), POWERPC_EXCP_VPU); \
+ return true; \
+ } \
+ } while (0)
+
/*
* Helpers for implementing sets of trans_* functions.
* Defer the implementation of NAME to FUNC, with optional extra arguments.
diff --git a/target/ppc/translate/vector-impl.c.inc
b/target/ppc/translate/vector-impl.c.inc
index 117ce9b137..197e903337 100644
--- a/target/ppc/translate/vector-impl.c.inc
+++ b/target/ppc/translate/vector-impl.c.inc
@@ -17,20 +17,12 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#define REQUIRE_ALTIVEC(CTX) \
- do { \
- if (unlikely(!(CTX)->altivec_enabled)) { \
- gen_exception((CTX), POWERPC_EXCP_VPU); \
- return true; \
- } \
- } while (0)
-
static bool trans_VCFUGED(DisasContext *ctx, arg_VX *a)
{
TCGv_i64 tgt, src, mask;
REQUIRE_INSNS_FLAGS2(ctx, ISA310);
- REQUIRE_ALTIVEC(ctx);
+ REQUIRE_VECTOR(ctx);
tgt = tcg_temp_new_i64();
src = tcg_temp_new_i64();
--
2.33.1
- Re: [PULL 03/54] target/ppc: Move load and store floating point instructions to decodetree, (continued)
[PULL 15/54] host-utils: Introduce mulu128, David Gibson, 2021/11/09
[PULL 08/54] target/ppc: Implement cnttzdm, David Gibson, 2021/11/09
[PULL 09/54] target/ppc: Implement pdepd instruction, David Gibson, 2021/11/09
[PULL 07/54] target/ppc: Implement cntlzdm, David Gibson, 2021/11/09
[PULL 05/54] target/ppc: Move LQ and STQ to decodetree, David Gibson, 2021/11/09
[PULL 10/54] target/ppc: Implement pextd instruction, David Gibson, 2021/11/09
[PULL 14/54] target/ppc: Implement DCFFIXQQ, David Gibson, 2021/11/09
[PULL 12/54] target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c,
David Gibson <=
[PULL 11/54] libdecnumber: introduce decNumberFrom[U]Int128, David Gibson, 2021/11/09
[PULL 16/54] libdecnumber: Introduce decNumberIntegralToInt128, David Gibson, 2021/11/09
[PULL 28/54] target/ppc: Move vcfuged to vmx-impl.c.inc, David Gibson, 2021/11/09
[PULL 25/54] target/ppc: Move ddedpd[q], denbcd[q], dscli[q], dscri[q] to decodetree, David Gibson, 2021/11/09
[PULL 23/54] target/ppc: Move dqua[q], drrnd[q] to decodetree, David Gibson, 2021/11/09
[PULL 26/54] ppc/pnv: Fix check on block device before updating drive contents, David Gibson, 2021/11/09
[PULL 31/54] target/ppc: Implement vsldbi/vsrdbi instructions, David Gibson, 2021/11/09
[PULL 06/54] target/ppc: Implement PLQ and PSTQ, David Gibson, 2021/11/09
[PULL 17/54] target/ppc: Implement DCTFIXQQ, David Gibson, 2021/11/09
[PULL 18/54] target/ppc: Do not update nip on DFP instructions, David Gibson, 2021/11/09