Re: [RFC PATCH 3/5] target/ppc: powerpc_excp: Consolidade TLB miss code

[David Gibson]

On Tue, Jun 01, 2021 at 06:46:47PM -0300, Fabiano Rosas wrote:
> The only difference in the code for Instruction fetch, Data load and
> Data store TLB miss errors is that when called from an unsupported
> processor (i.e. not one of 602, 603, 603e, G2, 7x5 or 74xx), they
> abort with a message specific to the operation type (insn fetch, data
> load/store).
> 
> If a processor does not support those interrupts we should not be
> registering them in init_excp_<proc> to begin with, so that error
> message would never be used.
> 
> I'm leaving the message in for completeness, but making it generic and
> consolidating the three interrupts into the same case statement body.
> 
> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>

Wow, what a mess that was.

Applied to ppc-for-6.1.

> ---
>  target/ppc/excp_helper.c | 37 ++-----------------------------------
>  1 file changed, 2 insertions(+), 35 deletions(-)
> 
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 9e3aae1c96..fd147e2a37 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -689,52 +689,20 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int 
> excp_model, int excp)
>                    "is not implemented yet !\n");
>          break;
>      case POWERPC_EXCP_IFTLB:     /* Instruction fetch TLB error              
> */
> -        switch (excp_model) {
> -        case POWERPC_EXCP_602:
> -        case POWERPC_EXCP_603:
> -        case POWERPC_EXCP_603E:
> -        case POWERPC_EXCP_G2:
> -            goto tlb_miss_tgpr;
> -        case POWERPC_EXCP_7x5:
> -            goto tlb_miss;
> -        case POWERPC_EXCP_74xx:
> -            goto tlb_miss_74xx;
> -        default:
> -            cpu_abort(cs, "Invalid instruction TLB miss exception\n");
> -            break;
> -        }
> -        break;
>      case POWERPC_EXCP_DLTLB:     /* Data load TLB miss                       
> */
> -        switch (excp_model) {
> -        case POWERPC_EXCP_602:
> -        case POWERPC_EXCP_603:
> -        case POWERPC_EXCP_603E:
> -        case POWERPC_EXCP_G2:
> -            goto tlb_miss_tgpr;
> -        case POWERPC_EXCP_7x5:
> -            goto tlb_miss;
> -        case POWERPC_EXCP_74xx:
> -            goto tlb_miss_74xx;
> -        default:
> -            cpu_abort(cs, "Invalid data load TLB miss exception\n");
> -            break;
> -        }
> -        break;
>      case POWERPC_EXCP_DSTLB:     /* Data store TLB miss                      
> */
>          switch (excp_model) {
>          case POWERPC_EXCP_602:
>          case POWERPC_EXCP_603:
>          case POWERPC_EXCP_603E:
>          case POWERPC_EXCP_G2:
> -        tlb_miss_tgpr:
>              /* Swap temporary saved registers with GPRs */
>              if (!(new_msr & ((target_ulong)1 << MSR_TGPR))) {
>                  new_msr |= (target_ulong)1 << MSR_TGPR;
>                  hreg_swap_gpr_tgpr(env);
>              }
> -            goto tlb_miss;
> +            /* fall through */
>          case POWERPC_EXCP_7x5:
> -        tlb_miss:
>  #if defined(DEBUG_SOFTWARE_TLB)
>              if (qemu_log_enabled()) {
>                  const char *es;
> @@ -769,7 +737,6 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int 
> excp_model, int excp)
>              msr |= ((env->last_way + 1) & (env->nb_ways - 1)) << 17;
>              break;
>          case POWERPC_EXCP_74xx:
> -        tlb_miss_74xx:
>  #if defined(DEBUG_SOFTWARE_TLB)
>              if (qemu_log_enabled()) {
>                  const char *es;
> @@ -799,7 +766,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int 
> excp_model, int excp)
>              msr |= env->error_code; /* key bit */
>              break;
>          default:
> -            cpu_abort(cs, "Invalid data store TLB miss exception\n");
> +            cpu_abort(cs, "Invalid TLB miss exception\n");
>              break;
>          }
>          break;

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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