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Re: [PATCH v2 0/5] Mac Old World ROM experiment


From: BALATON Zoltan
Subject: Re: [PATCH v2 0/5] Mac Old World ROM experiment
Date: Sat, 13 Jun 2020 21:36:23 +0200 (CEST)
User-agent: Alpine 2.22 (BSF 395 2020-01-19)

On Sat, 13 Jun 2020, BALATON Zoltan wrote:
On Sat, 13 Jun 2020, BALATON Zoltan wrote:
Version 2 with some more tweaks this now starts but drops in a Serial
Test Manager (see below) presumably because some POST step is failing,
I let others who know more about this machine figure out what's
missing from here.

Regards,
BALATON Zoltan


1 :pci_update_mappings_add d=0x55a1bb6254a0 00:01.0 0,0xf3000000+0x80000
     1 pci_cfg_read grackle 00:0 @0x0 -> 0x21057
     1 pci_cfg_read grackle 00:0 @0xa8 -> 0x0
     1 pci_cfg_write grackle 00:0 @0xa8 <- 0x40e0c
     1 pci_cfg_read grackle 00:0 @0xac -> 0x0
     1 pci_cfg_write grackle 00:0 @0xac <- 0x12000000
     1 pci_cfg_read grackle 00:0 @0xac -> 0x12000000
     1 pci_cfg_write grackle 00:0 @0xac <- 0x2000000
     1 pci_cfg_read grackle 00:0 @0x70 -> 0x0
     1 pci_cfg_write grackle 00:0 @0x70 <- 0x11000000
     1 machine_id_read(0, 2)
     1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
     1 pci_cfg_read grackle 00:0 @0xf0 -> 0x0
     1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
     1 machine_id_read(0, 2)
     1 portA_write unimplemented
     1 CUDA: unknown command 0x22
     1 CUDA: unknown command 0x26
     3 CUDA: unknown command 0x25
     1 pci_cfg_write grackle 00:0 @0x80 <- 0xffffffff
     1 pci_cfg_write grackle 00:0 @0x88 <- 0xffffffff
     1 pci_cfg_write grackle 00:0 @0x90 <- 0xffffffff
     1 pci_cfg_write grackle 00:0 @0x98 <- 0xffffffff
     1 pci_cfg_write grackle 00:0 @0x84 <- 0xffffffff
     1 pci_cfg_write grackle 00:0 @0x8c <- 0xffffffff
     1 pci_cfg_write grackle 00:0 @0x94 <- 0xffffffff
     1 pci_cfg_write grackle 00:0 @0x9c <- 0xffffffff
     1 pci_cfg_write grackle 00:0 @0xa0 <- 0x0
     1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
     1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12900000
     1 machine_id_read(0, 2)
     1 pci_cfg_read grackle 00:0 @0x8 -> 0x6000140
     1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12900000
     1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
     1 pci_cfg_write grackle 00:0 @0xf0 <- 0x12940000
     1 pci_cfg_write grackle 00:0 @0xf4 <- 0x40010fe4
     1 pci_cfg_write grackle 00:0 @0xf8 <- 0x7302293
     1 pci_cfg_write grackle 00:0 @0xfc <- 0x25302220
     1 pci_cfg_read grackle 00:0 @0xa0 -> 0x0
     1 pci_cfg_write grackle 00:0 @0xa0 <- 0x67000000
     1 pci_cfg_read grackle 00:0 @0xf0 -> 0x12940000
     1 pci_cfg_write grackle 00:0 @0xf0 <- 0x129c0000
550755 Unassigned mem read 00000000f3014020

So this seems to be the missing sound device (maybe trying to play the startup chime). Adding some dummy implementation there gets me a little bit further:

     2 macio: screamer read 20  4
     1 macio: screamer write 10  4 = 600000
     1 macio: screamer read 10  4
     2 macio: screamer read 20  4
     1 macio: screamer write 10  4 = 8220000
     1 macio: screamer read 10  4
     1 macio: screamer write 10  4 = 0
     1 macio: screamer read 10  4
     7 CUDA: unknown command 0x22
     2 macio: screamer read 20  4
     1 macio: screamer write 10  4 = 180000
     1 macio: screamer read 10  4
     1 CUDA: unknown command 0x22
     1 macio: screamer read 0  4
     1 macio: screamer write 0  4 = 11050000
     1 dbdma_unassigned_flush: use of unassigned channel 16
     1 dbdma_unassigned_rw: use of unassigned channel 16
     1 Unassigned mem write 0000000000240020 = 0x10006238
     1 Unassigned mem write 0000000000240024 = 0xffe32c00
     1 Unassigned mem write 0000000000240028 = 0x0
     1 Unassigned mem write 000000000024002c = 0x84006238

then stops here, I guess it may be waiting for an interrupt so probably we

Or maybe it's the missing i2c bus in cuda (CUDA commands 0x22 and 0x25 above) which I can imagine may try to get SPD data from RAM to configure memory.

Regards,
BALATON Zoltan




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