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Re: [PATCH for-5.0 v5 00/23] ppc/pnv: add XIVE support for KVM guests
From: |
David Gibson |
Subject: |
Re: [PATCH for-5.0 v5 00/23] ppc/pnv: add XIVE support for KVM guests |
Date: |
Sat, 23 Nov 2019 20:25:24 +1100 |
User-agent: |
Mutt/1.12.1 (2019-06-15) |
On Fri, Nov 22, 2019 at 07:17:05PM +0100, Cédric Le Goater wrote:
> On 15/11/2019 17:24, Cédric Le Goater wrote:
> > Hello,
> >
> > The QEMU PowerNV machine emulates a baremetal OpenPOWER system and
> > acts as an hypervisor (L0). Supporting emulation of KVM to run guests
> > (L1) requires a few more extensions, among which guest support for the
> > XIVE interrupt controller on POWER9 processor.
> >
> > The following changes extend the XIVE models with the new XiveFabric
> > and XivePresenter interfaces to provide support for XIVE escalations
> > and interrupt resend. This mechanism is used by XIVE to notify the
> > hypervisor that a vCPU is not dispatched on a HW thread. Tested on a
> > QEMU PowerNV machine and a simple QEMU pseries guest doing network on
> > a local bridge.
> >
> > The XIVE interrupt controller offers a way to increase the XIVE
> > resources per chip by configuring multiple XIVE blocks on a chip. This
> > is not currently supported by the model. However, some configurations,
> > such as OPAL/skiboot, use one block-per-chip configuration with some
> > optimizations. One of them is to override the hardwired chip ID by the
> > block id in the PowerBUS operations and for CAM line compares. This
> > patchset improves the support for this setup. Tested with 4 chips.
> >
> > A series from Suraj adding guest support in the Radix MMU model of the
> > QEMU PowerNV machine is still required and will be send later. The
> > whole patchset can be found under :
> >
> > https://github.com/legoater/qemu/tree/powernv-4.2
>
>
> [ ... ]
>
> > Cédric Le Goater (23):
> > ppc/xive: Record the IPB in the associated NVT
> > ppc/xive: Introduce helpers for the NVT id
> > ppc/pnv: Remove pnv_xive_vst_size() routine
> > ppc/pnv: Dump the XIVE NVT table
> > ppc/pnv: Quiesce some XIVE errors
> > ppc/xive: Introduce OS CAM line helpers
> > ppc/xive: Check V bit in TM_PULL_POOL_CTX
> > ppc/xive: Introduce a XivePresenter interface
> > ppc/xive: Implement the XivePresenter interface
>
> David,
>
> I have reworked the following patches to address Greg's comments
> and your comment on "ppc/pnv: Dump the XIVE NVT table".
>
> Shall I wait for some feedback from you or just resend ?
Just resend, thanks.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [PATCH for-5.0 v5 17/23] ppc/pnv: Clarify how the TIMA is accessed on a multichip system, (continued)
- [PATCH for-5.0 v5 18/23] ppc/xive: Move the TIMA operations to the controller model, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 19/23] ppc/xive: Remove the get_tctx() XiveRouter handler, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 20/23] ppc/xive: Introduce a xive_tctx_ipb_update() helper, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 21/23] ppc/xive: Synthesize interrupt from the saved IPB in the NVT, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 22/23] ppc/pnv: Introduce a pnv_xive_block_id() helper, Cédric Le Goater, 2019/11/15
- [PATCH for-5.0 v5 23/23] ppc/pnv: Extend XiveRouter with a get_block_id() handler, Cédric Le Goater, 2019/11/15
- Re: [PATCH for-5.0 v5 00/23] ppc/pnv: add XIVE support for KVM guests, Cédric Le Goater, 2019/11/22
- Re: [PATCH for-5.0 v5 00/23] ppc/pnv: add XIVE support for KVM guests,
David Gibson <=