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Re: PowerNV decrementer fails to fire
From: |
Anton Blanchard |
Subject: |
Re: PowerNV decrementer fails to fire |
Date: |
Fri, 8 Nov 2019 07:02:17 +1100 |
Hi Cédric,
> I could reproduce but I had to set HILE in HDI0 to make progress.
> The test program misses a :
>
> /* HID0: HILE */
> LOAD_IMM64(r0, 0x800000000000000)
> mtspr 0x3f0,r0
>
> If I am correct.
Oops, yes you are right - we had a local HILE hack that we forgot
about.
> With a quick hack, QEMU generated the expected DECR exception but
> it's ugly and incomplete. The emulation of the mtmsrd instruction
> requires more care. The L=1 form needs a rework to handle pending
> interrupts and we need to modify the MSR store helper also to return
> the highest exception.
Thanks for looking into it!
Anton
>
> Thanks,
>
> C.
>
> >
> > Thanks,
> > Anton
> > --
> >
> > #include <ppc-asm.h>
> >
> > /* Load an immediate 64-bit value into a register */
> > #define LOAD_IMM64(r, e) \
> > lis r,(e)@highest; \
> > ori r,r,(e)@higher; \
> > rldicr r,r, 32, 31; \
> > oris r,r, (e)@h; \
> > ori r,r, (e)@l;
> >
> > #define FIXUP_ENDIAN
> > \ tdi 0,0,0x48; /* Reverse endian of b . + 8
> > */ \ b 191f; /* Skip trampoline if endian is
> > good */ \ .long 0xa600607d; /* mfmsr r11
> > */ \ .long 0x01006b69; /* xori r11,r11,1
> > */ \ .long 0x05009f42; /* bcl 20,31,$+4
> > */ \ .long 0xa602487d; /* mflr r10
> > */ \ .long 0x14004a39; /* addi r10,r10,20
> > */ \ .long 0xa64b5a7d; /* mthsrr0 r10
> > */ \ .long 0xa64b7b7d; /* mthsrr1 r11
> > */ \ .long 0x2402004c; /* hrfid
> > */ \ 191:
> >
> > .= 0x0
> > .globl _start
> > _start:
> > b 1f
> >
> > .= 0x10
> > FIXUP_ENDIAN
> > b 1f
> >
> > .= 0x100
> > 1:
> > FIXUP_ENDIAN
> > b __initialize
> >
> > #define EXCEPTION(nr) \
> > .= nr ;\
> > b .
> >
> > /* More exception stubs */
> > EXCEPTION(0x300)
> > EXCEPTION(0x380)
> > EXCEPTION(0x400)
> > EXCEPTION(0x480)
> > EXCEPTION(0x500)
> > EXCEPTION(0x600)
> > EXCEPTION(0x700)
> > EXCEPTION(0x800)
> >
> > .= 0x900
> > LOAD_IMM64(r0, 0x1000000)
> > mtdec r0
> > addi r31,r31,1
> > rfid
> >
> > EXCEPTION(0x980)
> > EXCEPTION(0xa00)
> > EXCEPTION(0xb00)
> > EXCEPTION(0xc00)
> > EXCEPTION(0xd00)
> > EXCEPTION(0xe00)
> > EXCEPTION(0xe20)
> > EXCEPTION(0xe40)
> > EXCEPTION(0xe60)
> > EXCEPTION(0xe80)
> > EXCEPTION(0xf00)
> > EXCEPTION(0xf20)
> > EXCEPTION(0xf40)
> > EXCEPTION(0xf60)
> > EXCEPTION(0xf80)
> > EXCEPTION(0x1000)
> > EXCEPTION(0x1100)
> > EXCEPTION(0x1200)
> > EXCEPTION(0x1300)
> > EXCEPTION(0x1400)
> > EXCEPTION(0x1500)
> > EXCEPTION(0x1600)
> >
> > __initialize:
> > /* SF, HV, EE, RI, LE */
> > LOAD_IMM64(r0, 0x9000000000008003)
> > mtmsrd r0
> >
> > LOAD_IMM64(r0, 0x1000000)
> > mtdec r0
> >
> > 1: LOAD_IMM64(r30,0x8000)
> > mtmsrd r30,1
> >
> > /* We should take the decrementer here */
> > #ifdef FIX_BROKEN
> > LOAD_IMM64(r29,0x100000000)
> > mtctr r29
> > 2: bdnz 2b
> > #endif
> >
> > li r30,0x0
> > mtmsrd r30,1
> > b 1b
> >
>