[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PATCH v4 03/25] ppc/pnv: Introduce a PNV_CHIP_CPU_FOREACH()
From: |
Cédric Le Goater |
Subject: |
[Qemu-ppc] [PATCH v4 03/25] ppc/pnv: Introduce a PNV_CHIP_CPU_FOREACH() helper |
Date: |
Wed, 18 Sep 2019 18:06:23 +0200 |
As there is now easy way to loop on the CPUs belonging to a chip, add
a helper to filter out external CPUs.
Signed-off-by: Cédric Le Goater <address@hidden>
---
hw/intc/pnv_xive.c | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index ae449aa1119b..e1c15b6b5b71 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -392,15 +392,36 @@ static int pnv_xive_get_eas(XiveRouter *xrtr, uint8_t
blk, uint32_t idx,
return pnv_xive_vst_read(xive, VST_TSEL_IVT, blk, idx, eas);
}
+static int cpu_pir(PowerPCCPU *cpu)
+{
+ CPUPPCState *env = &cpu->env;
+ return env->spr_cb[SPR_PIR].default_value;
+}
+
+static int cpu_chip_id(PowerPCCPU *cpu)
+{
+ int pir = cpu_pir(cpu);
+ return (pir >> 8) & 0x7f;
+}
+
+#define PNV_CHIP_CPU_FOREACH(chip, cs) \
+ CPU_FOREACH(cs) \
+ if (chip->chip_id != cpu_chip_id(POWERPC_CPU(cs))) {} else
+
static int pnv_xive_match_nvt(XivePresenter *xptr, uint8_t format,
uint8_t nvt_blk, uint32_t nvt_idx,
bool cam_ignore, uint8_t priority,
uint32_t logic_serv, XiveTCTXMatch *match)
{
+ PnvXive *xive = PNV_XIVE(xptr);
CPUState *cs;
int count = 0;
- CPU_FOREACH(cs) {
+ /*
+ * Loop on all CPUs of the machine and filter out the CPUs
+ * belonging to another chip.
+ */
+ PNV_CHIP_CPU_FOREACH(xive->chip, cs) {
PowerPCCPU *cpu = POWERPC_CPU(cs);
XiveTCTX *tctx = XIVE_TCTX(pnv_cpu_state(cpu)->intc);
int ring;
--
2.21.0
- [Qemu-ppc] [PATCH v4 00/25] ppc/pnv: add XIVE support for KVM guests, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 01/25] ppc/xive: Introduce a XivePresenter interface, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 02/25] ppc/xive: Implement the XivePresenter interface, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 03/25] ppc/pnv: Introduce a PNV_CHIP_CPU_FOREACH() helper,
Cédric Le Goater <=
- [Qemu-ppc] [PATCH v4 04/25] ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 05/25] ppc/xive: Introduce a XiveFabric interface, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 06/25] ppc/pnv: Implement the XiveFabric interface, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 07/25] ppc/spapr: Implement the XiveFabric interface, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 08/25] ppc/xive: Use the XiveFabric and XivePresenter interfaces, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 09/25] ppc/xive: Extend the TIMA operation with a XivePresenter parameter, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 10/25] ppc/pnv: Clarify how the TIMA is accessed on a multichip system, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 11/25] ppc/xive: Move the TIMA operations to the controller model, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 12/25] ppc/xive: Remove the get_tctx() XiveRouter handler, Cédric Le Goater, 2019/09/18
- [Qemu-ppc] [PATCH v4 13/25] ppc/xive: Introduce a xive_tctx_ipb_update() helper, Cédric Le Goater, 2019/09/18