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Re: [Qemu-ppc] [PATCH] ppc/xive: Make XIVE generate the proper interrupt
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH] ppc/xive: Make XIVE generate the proper interrupt types |
Date: |
Fri, 7 Jun 2019 10:16:32 +1000 |
User-agent: |
Mutt/1.11.4 (2019-03-13) |
On Thu, Jun 06, 2019 at 07:44:09PM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt <address@hidden>
>
> It should be generic Hypervisor Virtualization interrupts for HV
> directed rings and traditional External Interrupts for the OS directed
> ring.
>
> Don't generate anything for the user ring as it isn't actually
> supported.
>
> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> Signed-off-by: Cédric Le Goater <address@hidden>
> Reviewed-by: David Gibson <address@hidden>
Applied, thanks.
> ---
>
> I forgot to resend this patch, an important one for HV machines !
>
> include/hw/ppc/xive.h | 3 ++-
> hw/intc/xive.c | 22 +++++++++++++++++++---
> 2 files changed, 21 insertions(+), 4 deletions(-)
>
> diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
> index d872f96d1a1b..a6ee7e831d8b 100644
> --- a/include/hw/ppc/xive.h
> +++ b/include/hw/ppc/xive.h
> @@ -317,7 +317,8 @@ typedef struct XiveTCTX {
> DeviceState parent_obj;
>
> CPUState *cs;
> - qemu_irq output;
> + qemu_irq hv_output;
> + qemu_irq os_output;
>
> uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE];
> } XiveTCTX;
> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
> index 0c74e47aa49c..b2b92a92c84f 100644
> --- a/hw/intc/xive.c
> +++ b/hw/intc/xive.c
> @@ -61,13 +61,28 @@ static uint8_t exception_mask(uint8_t ring)
> }
> }
>
> +static qemu_irq xive_tctx_output(XiveTCTX *tctx, uint8_t ring)
> +{
> + switch (ring) {
> + case TM_QW0_USER:
> + return 0; /* Not supported */
> + case TM_QW1_OS:
> + return tctx->os_output;
> + case TM_QW2_HV_POOL:
> + case TM_QW3_HV_PHYS:
> + return tctx->hv_output;
> + default:
> + return 0;
> + }
> +}
> +
> static uint64_t xive_tctx_accept(XiveTCTX *tctx, uint8_t ring)
> {
> uint8_t *regs = &tctx->regs[ring];
> uint8_t nsr = regs[TM_NSR];
> uint8_t mask = exception_mask(ring);
>
> - qemu_irq_lower(tctx->output);
> + qemu_irq_lower(xive_tctx_output(tctx, ring));
>
> if (regs[TM_NSR] & mask) {
> uint8_t cppr = regs[TM_PIPR];
> @@ -100,7 +115,7 @@ static void xive_tctx_notify(XiveTCTX *tctx, uint8_t ring)
> default:
> g_assert_not_reached();
> }
> - qemu_irq_raise(tctx->output);
> + qemu_irq_raise(xive_tctx_output(tctx, ring));
> }
> }
>
> @@ -556,7 +571,8 @@ static void xive_tctx_realize(DeviceState *dev, Error
> **errp)
> env = &cpu->env;
> switch (PPC_INPUT(env)) {
> case PPC_FLAGS_INPUT_POWER9:
> - tctx->output = env->irq_inputs[POWER9_INPUT_INT];
> + tctx->hv_output = env->irq_inputs[POWER9_INPUT_HINT];
> + tctx->os_output = env->irq_inputs[POWER9_INPUT_INT];
> break;
>
> default:
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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