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[Qemu-ppc] [PATCH for-stable 4/5] target/ppc: Fix vsum2sws
From: |
Mark Cave-Ayland |
Subject: |
[Qemu-ppc] [PATCH for-stable 4/5] target/ppc: Fix vsum2sws |
Date: |
Tue, 4 Jun 2019 20:01:14 +0100 |
From: Anton Blanchard <address@hidden>
A recent cleanup changed the pre zeroing of the result from 64 bit
to 32 bit operations:
- result.u64[i] = 0;
+ result.VsrW(i) = 0;
This corrupts the result.
Fixes: 60594fea298d ("target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in
int_helper.c")
Signed-off-by: Anton Blanchard <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/int_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 162add561e..6bd1d32b1d 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2030,7 +2030,7 @@ void helper_vsum2sws(CPUPPCState *env, ppc_avr_t *r,
ppc_avr_t *a, ppc_avr_t *b)
for (i = 0; i < ARRAY_SIZE(r->u64); i++) {
int64_t t = (int64_t)b->VsrSW(upper + i * 2);
- result.VsrW(i) = 0;
+ result.VsrD(i) = 0;
for (j = 0; j < ARRAY_SIZE(r->u64); j++) {
t += a->VsrSW(2 * i + j);
}
--
2.11.0
- [Qemu-ppc] [PATCH for-stable 0/5] target/ppc: VSX/xvxsigdp fixes for 4.0 stable, Mark Cave-Ayland, 2019/06/04
- [Qemu-ppc] [PATCH for-stable 2/5] target/ppc: Fix xvxsigdp, Mark Cave-Ayland, 2019/06/04
- [Qemu-ppc] [PATCH for-stable 3/5] target/ppc: Fix xxbrq, xxbrw, Mark Cave-Ayland, 2019/06/04
- [Qemu-ppc] [PATCH for-stable 1/5] target/ppc: Fix xvabs[sd]p, xvnabs[sd]p, xvneg[sd]p, xvcpsgn[sd]p, Mark Cave-Ayland, 2019/06/04
- [Qemu-ppc] [PATCH for-stable 5/5] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x, Mark Cave-Ayland, 2019/06/04
- [Qemu-ppc] [PATCH for-stable 4/5] target/ppc: Fix vsum2sws,
Mark Cave-Ayland <=
- Re: [Qemu-ppc] [PATCH for-stable 0/5] target/ppc: VSX/xvxsigdp fixes for 4.0 stable, David Gibson, 2019/06/04