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[Qemu-ppc] [PULL 18/60] spapr: Force SPAPR_MEMORY_BLOCK_SIZE to be a hwa
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 18/60] spapr: Force SPAPR_MEMORY_BLOCK_SIZE to be a hwaddr (64-bit) |
Date: |
Sun, 10 Mar 2019 19:26:21 +1100 |
SPAPR_MEMORY_BLOCK_SIZE is logically a difference in memory addresses, and
hence of type hwaddr which is 64-bit. Previously it wasn't marked as such
which means that it could be treated as 32-bit. That will work in some
circumstances but if multiplied by another 32-bit value it could lead to
a 32-bit overflow and an incorrect result.
One specific instance of this in spapr_lmb_dt_populate() was spotted by
Coverity (CID 1399145).
Reported-by: Peter Maydell <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
include/hw/ppc/spapr.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index ff1bd60615..1311ebe28e 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -792,7 +792,7 @@ int spapr_rtc_import_offset(sPAPRRTCState *rtc, int64_t
legacy_offset);
#define TYPE_SPAPR_RNG "spapr-rng"
-#define SPAPR_MEMORY_BLOCK_SIZE (1 << 28) /* 256MB */
+#define SPAPR_MEMORY_BLOCK_SIZE ((hwaddr)1 << 28) /* 256MB */
/*
* This defines the maximum number of DIMM slots we can have for sPAPR
--
2.20.1
- [Qemu-ppc] [PULL 01/60] vfio/spapr: Fix indirect levels calculation, (continued)
- [Qemu-ppc] [PULL 01/60] vfio/spapr: Fix indirect levels calculation, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 13/60] target/ppc: Move exception vector offset computation into a function, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 03/60] spapr: Simulate CAS for qtest, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 07/60] target/ppc: Implement large decrementer support for KVM, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 08/60] target/ppc/spapr: Enable the large decrementer for pseries-4.0, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 09/60] target/ppc/spapr: Add workaround option to SPAPR_CAP_IBS, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 11/60] target/ppc/tcg: make spapr_caps apply cap-[cfpc/sbbc/ibs] non-fatal for tcg, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 12/60] target/ppc/spapr: Enable mitigations by default for pseries-4.0 machine type, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 14/60] target/ppc: Move handling of hardware breakpoints to a separate function, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 10/60] target/ppc/spapr: Add SPAPR_CAP_CCF_ASSIST, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 18/60] spapr: Force SPAPR_MEMORY_BLOCK_SIZE to be a hwaddr (64-bit),
David Gibson <=
- [Qemu-ppc] [PULL 06/60] target/ppc: Implement large decrementer support for TCG, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 22/60] ppc: externalize ppc_get_vcpu_by_pir(), David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 21/60] ppc/xive: hardwire the Physical CAM line of the thread context, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 15/60] target/ppc: Refactor kvm_handle_debug, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 29/60] ppc/xive: activate HV support, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 19/60] target/ppc/spapr: Enable H_PAGE_INIT in-kernel handling, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 17/60] target/ppc/spapr: Clear partition table entry when allocating hash table, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 25/60] ppc/pnv: change the CPU machine_data presenter type to Object *, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 20/60] PPC: E500: Add FSL I2C controller and integrate RTC with it, David Gibson, 2019/03/10
- [Qemu-ppc] [PULL 31/60] ppc/pnv: psi: add a PSIHB_REG macro, David Gibson, 2019/03/10