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[Qemu-ppc] [PULL 49/50] ppc/pnv: add INITRD_MAX_SIZE constant
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 49/50] ppc/pnv: add INITRD_MAX_SIZE constant |
Date: |
Tue, 26 Feb 2019 15:53:03 +1100 |
From: Murilo Opsfelder Araujo <address@hidden>
The current 0x10000000 value is actually 256MiB, not 128MB as the comment
suggests. Move it to a constant and fix the comment (no change in the size
value).
Signed-off-by: Murilo Opsfelder Araujo <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 4144976aec..0cd6af4669 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -56,6 +56,7 @@
#define KERNEL_LOAD_ADDR 0x20000000
#define KERNEL_MAX_SIZE (256 * MiB)
#define INITRD_LOAD_ADDR 0x60000000
+#define INITRD_MAX_SIZE (256 * MiB)
static const char *pnv_chip_core_typename(const PnvChip *o)
{
@@ -601,7 +602,7 @@ static void pnv_init(MachineState *machine)
if (machine->initrd_filename) {
pnv->initrd_base = INITRD_LOAD_ADDR;
pnv->initrd_size = load_image_targphys(machine->initrd_filename,
- pnv->initrd_base, 0x10000000); /* 128MB max
*/
+ pnv->initrd_base, INITRD_MAX_SIZE);
if (pnv->initrd_size < 0) {
error_report("Could not load initial ram disk '%s'",
machine->initrd_filename);
--
2.20.1
- [Qemu-ppc] [PULL 22/50] target/ppc: Fix ordering of hash MMU accesses, (continued)
- [Qemu-ppc] [PULL 22/50] target/ppc: Fix ordering of hash MMU accesses, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 28/50] target/ppc: Basic POWER9 bare-metal radix MMU support, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 35/50] spapr: Expose the name of the interrupt controller node, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 27/50] target/ppc: Support for POWER9 native hash, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 30/50] spapr: Generate FDT fragment for LMBs at configure connector time, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 39/50] spapr: populate PHB DRC entries for root DT node, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 46/50] ppc/xive: xive does not have a POWER7 interrupt model, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 29/50] spapr_drc: Allow FDT fragment to be added later, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 33/50] spapr/drc: Drop spapr_drc_attach() fdt argument, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 38/50] spapr: create DR connectors for PHBs, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 49/50] ppc/pnv: add INITRD_MAX_SIZE constant,
David Gibson <=
- [Qemu-ppc] [PULL 36/50] spapr_irq: Expose the phandle of the interrupt controller, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 50/50] ppc/pnv: use IEC binary prefixes to represent sizes, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 42/50] spapr_pci: add ibm, my-drc-index property for PHB hotplug, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 40/50] spapr_events: add support for phb hotplug events, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 32/50] spapr/pci: Generate FDT fragment at configure connector time, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 34/50] xics: Write source state to KVM at claim time, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 37/50] spapr_pci: add PHB unrealize, David Gibson, 2019/02/25
- [Qemu-ppc] [PULL 44/50] spapr: enable PHB hotplug for default pseries machine type, David Gibson, 2019/02/25