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[Qemu-ppc] [PATCH 07/17] target/ppc: convert xxspltw to vector operation
From: |
Mark Cave-Ayland |
Subject: |
[Qemu-ppc] [PATCH 07/17] target/ppc: convert xxspltw to vector operations |
Date: |
Fri, 15 Feb 2019 10:00:48 +0000 |
From: Richard Henderson <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
---
target/ppc/translate/vsx-impl.inc.c | 36 +++++++++++-------------------------
1 file changed, 11 insertions(+), 25 deletions(-)
diff --git a/target/ppc/translate/vsx-impl.inc.c
b/target/ppc/translate/vsx-impl.inc.c
index 944fc0608a..0e8cecb00a 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -1359,38 +1359,24 @@ static void gen_xxsel(DisasContext * ctx)
static void gen_xxspltw(DisasContext *ctx)
{
- TCGv_i64 b, b2;
- TCGv_i64 vsr;
+ int rt = xT(ctx->opcode);
+ int rb = xB(ctx->opcode);
+ int uim = UIM(ctx->opcode);
+ int tofs, bofs;
if (unlikely(!ctx->vsx_enabled)) {
gen_exception(ctx, POWERPC_EXCP_VSXU);
return;
}
- vsr = tcg_temp_new_i64();
- if (UIM(ctx->opcode) & 2) {
- get_cpu_vsrl(vsr, xB(ctx->opcode));
- } else {
- get_cpu_vsrh(vsr, xB(ctx->opcode));
- }
-
- b = tcg_temp_new_i64();
- b2 = tcg_temp_new_i64();
-
- if (UIM(ctx->opcode) & 1) {
- tcg_gen_ext32u_i64(b, vsr);
- } else {
- tcg_gen_shri_i64(b, vsr, 32);
- }
-
- tcg_gen_shli_i64(b2, b, 32);
- tcg_gen_or_i64(vsr, b, b2);
- set_cpu_vsrh(xT(ctx->opcode), vsr);
- set_cpu_vsrl(xT(ctx->opcode), vsr);
+ tofs = vsr_full_offset(rt);
+ bofs = vsr_full_offset(rb);
+ bofs += uim << MO_32;
+#ifndef HOST_WORDS_BIG_ENDIAN
+ bofs ^= 8 | 4;
+#endif
- tcg_temp_free_i64(vsr);
- tcg_temp_free_i64(b);
- tcg_temp_free_i64(b2);
+ tcg_gen_gvec_dup_mem(MO_32, tofs, bofs, 16, 16);
}
#define pattern(x) (((x) & 0xff) * (~(uint64_t)0 / 0xff))
--
2.11.0
- [Qemu-ppc] [PATCH 00/17] target/ppc: convert instructions to use TCG vector operations, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 07/17] target/ppc: convert xxspltw to vector operations,
Mark Cave-Ayland <=
- [Qemu-ppc] [PATCH 02/17] target/ppc: convert vaddu[b, h, w, d] and vsubu[b, h, w, d] over to use vector operations, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 01/17] target/ppc: convert VMX logical instructions to use vector operations, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 05/17] target/ppc: convert VSX logical operations to vector operations, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 08/17] target/ppc: convert xxsel to vector operations, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 04/17] target/ppc: convert vsplt[bhw] to use vector operations, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 09/17] target/ppc: Pass integer to helper_mtvscr, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 03/17] target/ppc: convert vspltis[bhw] to use vector operations, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 06/17] target/ppc: convert xxspltib to vector operations, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 17/17] target/ppc: convert vmin* and vmax* to vector operations, Mark Cave-Ayland, 2019/02/15
- [Qemu-ppc] [PATCH 10/17] target/ppc: Use helper_mtvscr for reset and gdb, Mark Cave-Ayland, 2019/02/15