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[Qemu-ppc] [PULL 27/29] ppc/xics: allow ICSState to have an offset 0
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 27/29] ppc/xics: allow ICSState to have an offset 0 |
Date: |
Wed, 9 Jan 2019 09:45:58 +1100 |
From: Cédric Le Goater <address@hidden>
commit 15ed653fa49a ("ppc/xics: An ICS with offset 0 is assumed to be
uninitialized") introduced an extra check on the ICS offset which is
not strictly necessary.
Revert the change to be able to map the XICS IRQ number space on the
XIVE IRQ number space.
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
include/hw/ppc/xics.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 7668c381a8..07508cbd21 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -139,8 +139,7 @@ struct ICSState {
static inline bool ics_valid_irq(ICSState *ics, uint32_t nr)
{
- return (ics->offset != 0) && (nr >= ics->offset)
- && (nr < (ics->offset + ics->nr_irqs));
+ return (nr >= ics->offset) && (nr < (ics->offset + ics->nr_irqs));
}
struct ICSIRQState {
--
2.20.1
- [Qemu-ppc] [PULL 14/29] MAINTAINERS: Add some missing ppc-related files, (continued)
- [Qemu-ppc] [PULL 14/29] MAINTAINERS: Add some missing ppc-related files, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 16/29] spapr: move spapr_create_phb() to core machine code, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 11/29] target/ppc: merge ppc_vsr_t and ppc_avr_t union types, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 18/29] spapr_pci: Define SPAPR_MAX_PHBS in hw/pci-host/spapr.h, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 13/29] target/ppc: replace AVR* macros with Vsr* macros, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 15/29] MAINTAINERS: add qemu_vga.ndrv file entry for Mac machines, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 09/29] target/ppc: introduce get_cpu_vsr{l, h}() and set_cpu_vsr{l, h}() helpers for VSR register access, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 17/29] pci: allow cleanup/unregistration of PCI root buses, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 07/29] target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 12/29] target/ppc: move FP and VMX registers into aligned vsr register array, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 27/29] ppc/xics: allow ICSState to have an offset 0,
David Gibson <=
- [Qemu-ppc] [PULL 21/29] ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 19/29] spapr/xive: simplify the sPAPR IRQ qirq method for XIVE, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 20/29] spapr: modify the prototype of the cpu_intc_create() method, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 28/29] spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 24/29] ppc: export the XICS and XIVE set_irq handlers, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 26/29] spapr: move the qemu_irq array under the machine, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 29/29] spapr: enable XIVE MMIOs at reset, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 22/29] ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPU, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 25/29] pnv/psi: move the ICSState qemu_irq array under the PSI device model, David Gibson, 2019/01/08
- [Qemu-ppc] [PULL 23/29] spapr: return from post_load method when RTC import fails, David Gibson, 2019/01/08